]> git.baikalelectronics.ru Git - uboot.git/commitdiff
imx: kontron-sl-mx8mm: Adjust devicetree names, compatibles and model strings
authorFrieder Schrempf <frieder.schrempf@kontron.de>
Wed, 24 Aug 2022 13:59:15 +0000 (15:59 +0200)
committerStefano Babic <sbabic@denx.de>
Thu, 20 Oct 2022 15:35:51 +0000 (17:35 +0200)
This adjusts the names of the boards and SoMs to the official naming
used by Kontron marketing. These changes also affect devicetree
names and compatibles. The same changes have been submitted to the
Linux kernel.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
arch/arm/dts/Makefile
arch/arm/dts/imx8mm-kontron-bl-u-boot.dtsi [new file with mode: 0644]
arch/arm/dts/imx8mm-kontron-bl.dts [new file with mode: 0644]
arch/arm/dts/imx8mm-kontron-n801x-s-u-boot.dtsi [deleted file]
arch/arm/dts/imx8mm-kontron-n801x-s.dts [deleted file]
arch/arm/dts/imx8mm-kontron-n801x-som.dtsi [deleted file]
arch/arm/dts/imx8mm-kontron-sl.dtsi [new file with mode: 0644]
board/kontron/sl-mx8mm/MAINTAINERS
board/kontron/sl-mx8mm/spl.c
configs/kontron-sl-mx8mm_defconfig

index 0459be1f860494d41731993c41778b1e122f32c2..8dd50d7adb5e1690072188a2264db989899cdd38 100644 (file)
@@ -947,7 +947,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
        imx8mm-evk.dtb \
        imx8mm-icore-mx8mm-ctouch2.dtb \
        imx8mm-icore-mx8mm-edimm2.2.dtb \
-       imx8mm-kontron-n801x-s.dtb \
+       imx8mm-kontron-bl.dtb \
        imx8mm-mx8menlo.dtb \
        imx8mm-venice.dtb \
        imx8mm-venice-gw71xx-0x.dtb \
diff --git a/arch/arm/dts/imx8mm-kontron-bl-u-boot.dtsi b/arch/arm/dts/imx8mm-kontron-bl-u-boot.dtsi
new file mode 100644 (file)
index 0000000..2c62f05
--- /dev/null
@@ -0,0 +1,144 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Kontron Electronics GmbH
+ */
+
+#include "imx8mm-u-boot.dtsi"
+
+/ {
+       aliases {
+               usb0 = &usbotg1;
+               usb1 = &usbotg2;
+       };
+
+       wdt-reboot {
+               compatible = "wdt-reboot";
+               wdt = <&wdog1>;
+               u-boot,dm-spl;
+       };
+
+       firmware {
+               optee {
+                       compatible = "linaro,optee-tz";
+                       method = "smc";
+               };
+       };
+};
+
+&crypto {
+       u-boot,dm-spl;
+};
+
+&sec_jr0 {
+       u-boot,dm-spl;
+};
+
+&sec_jr1 {
+       u-boot,dm-spl;
+};
+
+&sec_jr2 {
+       u-boot,dm-spl;
+};
+
+&i2c1 {
+       u-boot,dm-spl;
+       u-boot,dm-pre-reloc;
+};
+
+&i2c2 {
+       status = "okay";
+       u-boot,dm-spl;
+       u-boot,dm-pre-reloc;
+};
+
+&pinctrl_ecspi1 {
+       u-boot,dm-spl;
+};
+
+&pinctrl_i2c1 {
+       u-boot,dm-spl;
+};
+
+&pinctrl_pmic {
+       u-boot,dm-spl;
+       fsl,pins = <
+               MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0               0x141
+               /* Disable Pullup for SD_VSEL */
+               MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4               0x41
+       >;
+};
+
+&pinctrl_uart3 {
+       u-boot,dm-spl;
+       u-boot,dm-pre-reloc;
+};
+
+&pinctrl_usdhc1 {
+       u-boot,dm-spl;
+};
+
+&pinctrl_usdhc1_100mhz {
+       u-boot,dm-spl;
+};
+
+&pinctrl_usdhc1_200mhz {
+       u-boot,dm-spl;
+};
+
+&pinctrl_usdhc2 {
+       u-boot,dm-spl;
+};
+
+&pca9450 {
+       u-boot,dm-spl;
+};
+
+&{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} {
+       u-boot,dm-spl;
+};
+
+&ecspi1 {
+       u-boot,dm-spl;
+};
+
+&gpio1 {
+       u-boot,dm-spl;
+};
+
+&gpio2 {
+       u-boot,dm-spl;
+};
+
+&gpio3 {
+       u-boot,dm-spl;
+};
+
+&gpio4 {
+       u-boot,dm-spl;
+};
+
+&gpio5 {
+       u-boot,dm-spl;
+};
+
+&uart3 {
+       u-boot,dm-spl;
+       u-boot,dm-pre-reloc;
+};
+
+&usdhc1 {
+       u-boot,dm-spl;
+};
+
+&usdhc2 {
+       u-boot,dm-spl;
+};
+
+&wdog1 {
+       u-boot,dm-spl;
+};
+
+&pinctrl_wdog {
+       u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/imx8mm-kontron-bl.dts b/arch/arm/dts/imx8mm-kontron-bl.dts
new file mode 100644 (file)
index 0000000..ca533ba
--- /dev/null
@@ -0,0 +1,350 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Copyright (C) 2019 Kontron Electronics GmbH
+ */
+
+/dts-v1/;
+
+#include "imx8mm-kontron-sl.dtsi"
+
+/ {
+       model = "Kontron BL i.MX8MM (N801X S)";
+       compatible = "kontron,imx8mm-bl", "kontron,imx8mm-sl", "fsl,imx8mm";
+
+       aliases {
+               ethernet1 = &usbnet;
+       };
+
+       /* fixed crystal dedicated to mcp2515 */
+       osc_can: clock-osc-can {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <16000000>;
+               clock-output-names = "osc-can";
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_gpio_led>;
+
+               led1 {
+                       label = "led1";
+                       gpios = <&gpio4 17 GPIO_ACTIVE_LOW>;
+                       linux,default-trigger = "heartbeat";
+               };
+
+               led2 {
+                       label = "led2";
+                       gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
+               };
+
+               led3 {
+                       label = "led3";
+                       gpios = <&gpio4 18 GPIO_ACTIVE_LOW>;
+               };
+
+               led4 {
+                       label = "led4";
+                       gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
+               };
+
+               led5 {
+                       label = "led5";
+                       gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
+               };
+
+               led6 {
+                       label = "led6";
+                       gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
+               };
+       };
+
+       pwm-beeper {
+               compatible = "pwm-beeper";
+               pwms = <&pwm2 0 5000 0>;
+       };
+
+       reg_rst_eth2: regulator-rst-eth2 {
+               compatible = "regulator-fixed";
+               regulator-name = "rst-usb-eth2";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_usb_eth2>;
+               gpio = <&gpio3 2 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+               regulator-always-on;
+       };
+
+       reg_vdd_5v: regulator-5v {
+               compatible = "regulator-fixed";
+               regulator-name = "vdd-5v";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+       };
+};
+
+&ecspi2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_ecspi2>;
+       cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
+       status = "okay";
+
+       can0: can@0 {
+               compatible = "microchip,mcp2515";
+               reg = <0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_can>;
+               clocks = <&osc_can>;
+               interrupt-parent = <&gpio4>;
+               interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
+               spi-max-frequency = <10000000>;
+               vdd-supply = <&reg_vdd_3v3>;
+               xceiver-supply = <&reg_vdd_5v>;
+       };
+};
+
+&ecspi3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_ecspi3>;
+       cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>;
+       status = "okay";
+};
+
+&fec1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_enet>;
+       phy-connection-type = "rgmii-rxid";
+       phy-handle = <&ethphy>;
+       status = "okay";
+
+       mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               ethphy: ethernet-phy@0 {
+                       reg = <0>;
+                       reset-assert-us = <1>;
+                       reset-deassert-us = <15000>;
+                       reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>;
+               };
+       };
+};
+
+&i2c4 {
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c4>;
+       status = "okay";
+
+       rtc@32 {
+               compatible = "epson,rx8900";
+               reg = <0x32>;
+       };
+};
+
+&pwm2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm2>;
+       status = "okay";
+};
+
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart1>;
+       uart-has-rtscts;
+       status = "okay";
+};
+
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart2>;
+       linux,rs485-enabled-at-boot-time;
+       uart-has-rtscts;
+       status = "okay";
+};
+
+&usbotg1 {
+       dr_mode = "otg";
+       over-current-active-low;
+       status = "okay";
+};
+
+&usbotg2 {
+       dr_mode = "host";
+       disable-over-current;
+       #address-cells = <1>;
+       #size-cells = <0>;
+       status = "okay";
+
+       usb1@1 {
+               compatible = "usb424,9514";
+               reg = <1>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               usbnet: ethernet@1 {
+                       compatible = "usb424,ec00";
+                       reg = <1>;
+                       local-mac-address = [ 00 00 00 00 00 00 ];
+               };
+       };
+};
+
+&usdhc2 {
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
+       pinctrl-0 = <&pinctrl_usdhc2>;
+       pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
+       vmmc-supply = <&reg_vdd_3v3>;
+       vqmmc-supply = <&reg_nvcc_sd>;
+       cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
+       status = "okay";
+};
+
+&iomuxc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_gpio>;
+
+       pinctrl_can: cangrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28               0x19
+               >;
+       };
+
+       pinctrl_ecspi2: ecspi2grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO            0x82
+                       MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI            0x82
+                       MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK            0x82
+                       MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13              0x19
+               >;
+       };
+
+       pinctrl_ecspi3: ecspi3grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_UART2_RXD_ECSPI3_MISO              0x82
+                       MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI              0x82
+                       MX8MM_IOMUXC_UART1_RXD_ECSPI3_SCLK              0x82
+                       MX8MM_IOMUXC_UART2_TXD_GPIO5_IO25               0x19
+               >;
+       };
+
+       pinctrl_enet: enetgrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_ENET_MDC_ENET1_MDC                 0x3
+                       MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO               0x3
+                       MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3           0x1f
+                       MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2           0x1f
+                       MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1           0x1f
+                       MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0           0x1f
+                       MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3           0x91
+                       MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2           0x91
+                       MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1           0x91
+                       MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0           0x91
+                       MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC           0x1f
+                       MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC           0x91
+                       MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL     0x91
+                       MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL     0x1f
+                       MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27               0x19 /* PHY RST */
+                       MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25                0x19 /* ETH IRQ */
+               >;
+       };
+
+       pinctrl_gpio_led: gpioledgrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16            0x19
+                       MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7                0x19
+                       MX8MM_IOMUXC_SAI1_RXD6_GPIO4_IO8                0x19
+                       MX8MM_IOMUXC_SAI1_RXD7_GPIO4_IO9                0x19
+                       MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17               0x19
+                       MX8MM_IOMUXC_SAI1_TXD6_GPIO4_IO18               0x19
+                       MX8MM_IOMUXC_SAI1_TXD7_GPIO4_IO19               0x19
+               >;
+       };
+
+       pinctrl_gpio: gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3               0x19
+                       MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7               0x19
+                       MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9               0x19
+                       MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11              0x19
+                       MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6               0x19
+                       MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8               0x19
+                       MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10              0x19
+                       MX8MM_IOMUXC_SAI3_MCLK_GPIO5_IO2                0x19
+               >;
+       };
+
+       pinctrl_i2c4: i2c4grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL                  0x400001c3
+                       MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA                  0x400001c3
+               >;
+       };
+
+       pinctrl_pwm2: pwm2grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SPDIF_RX_PWM2_OUT                  0x19
+               >;
+       };
+
+       pinctrl_uart1: uart1grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX              0x140
+                       MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX             0x140
+                       MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B          0x140
+                       MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B          0x140
+               >;
+       };
+
+       pinctrl_uart2: uart2grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX             0x140
+                       MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX              0x140
+                       MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B           0x140
+                       MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B           0x140
+               >;
+       };
+
+       pinctrl_usb_eth2: usbeth2grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_NAND_CE1_B_GPIO3_IO2               0x19
+               >;
+       };
+
+       pinctrl_usdhc2: usdhc2grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK                 0x190
+                       MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD                 0x1d0
+                       MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0             0x1d0
+                       MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1             0x1d0
+                       MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2             0x1d0
+                       MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3             0x1d0
+                       MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12                0x019
+               >;
+       };
+
+       pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK                 0x194
+                       MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD                 0x1d4
+                       MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0             0x1d4
+                       MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1             0x1d4
+                       MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2             0x1d4
+                       MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3             0x1d4
+                       MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12                0x019
+               >;
+       };
+
+       pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK                 0x196
+                       MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD                 0x1d6
+                       MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0             0x1d6
+                       MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1             0x1d6
+                       MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2             0x1d6
+                       MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3             0x1d6
+                       MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12                0x019
+               >;
+       };
+};
diff --git a/arch/arm/dts/imx8mm-kontron-n801x-s-u-boot.dtsi b/arch/arm/dts/imx8mm-kontron-n801x-s-u-boot.dtsi
deleted file mode 100644 (file)
index 2c62f05..0000000
+++ /dev/null
@@ -1,144 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2019 Kontron Electronics GmbH
- */
-
-#include "imx8mm-u-boot.dtsi"
-
-/ {
-       aliases {
-               usb0 = &usbotg1;
-               usb1 = &usbotg2;
-       };
-
-       wdt-reboot {
-               compatible = "wdt-reboot";
-               wdt = <&wdog1>;
-               u-boot,dm-spl;
-       };
-
-       firmware {
-               optee {
-                       compatible = "linaro,optee-tz";
-                       method = "smc";
-               };
-       };
-};
-
-&crypto {
-       u-boot,dm-spl;
-};
-
-&sec_jr0 {
-       u-boot,dm-spl;
-};
-
-&sec_jr1 {
-       u-boot,dm-spl;
-};
-
-&sec_jr2 {
-       u-boot,dm-spl;
-};
-
-&i2c1 {
-       u-boot,dm-spl;
-       u-boot,dm-pre-reloc;
-};
-
-&i2c2 {
-       status = "okay";
-       u-boot,dm-spl;
-       u-boot,dm-pre-reloc;
-};
-
-&pinctrl_ecspi1 {
-       u-boot,dm-spl;
-};
-
-&pinctrl_i2c1 {
-       u-boot,dm-spl;
-};
-
-&pinctrl_pmic {
-       u-boot,dm-spl;
-       fsl,pins = <
-               MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0               0x141
-               /* Disable Pullup for SD_VSEL */
-               MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4               0x41
-       >;
-};
-
-&pinctrl_uart3 {
-       u-boot,dm-spl;
-       u-boot,dm-pre-reloc;
-};
-
-&pinctrl_usdhc1 {
-       u-boot,dm-spl;
-};
-
-&pinctrl_usdhc1_100mhz {
-       u-boot,dm-spl;
-};
-
-&pinctrl_usdhc1_200mhz {
-       u-boot,dm-spl;
-};
-
-&pinctrl_usdhc2 {
-       u-boot,dm-spl;
-};
-
-&pca9450 {
-       u-boot,dm-spl;
-};
-
-&{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} {
-       u-boot,dm-spl;
-};
-
-&ecspi1 {
-       u-boot,dm-spl;
-};
-
-&gpio1 {
-       u-boot,dm-spl;
-};
-
-&gpio2 {
-       u-boot,dm-spl;
-};
-
-&gpio3 {
-       u-boot,dm-spl;
-};
-
-&gpio4 {
-       u-boot,dm-spl;
-};
-
-&gpio5 {
-       u-boot,dm-spl;
-};
-
-&uart3 {
-       u-boot,dm-spl;
-       u-boot,dm-pre-reloc;
-};
-
-&usdhc1 {
-       u-boot,dm-spl;
-};
-
-&usdhc2 {
-       u-boot,dm-spl;
-};
-
-&wdog1 {
-       u-boot,dm-spl;
-};
-
-&pinctrl_wdog {
-       u-boot,dm-spl;
-};
diff --git a/arch/arm/dts/imx8mm-kontron-n801x-s.dts b/arch/arm/dts/imx8mm-kontron-n801x-s.dts
deleted file mode 100644 (file)
index 23be1ec..0000000
+++ /dev/null
@@ -1,350 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ OR MIT
-/*
- * Copyright (C) 2019 Kontron Electronics GmbH
- */
-
-/dts-v1/;
-
-#include "imx8mm-kontron-n801x-som.dtsi"
-
-/ {
-       model = "Kontron i.MX8MM N801X S";
-       compatible = "kontron,imx8mm-n801x-s", "kontron,imx8mm-n801x-som", "fsl,imx8mm";
-
-       aliases {
-               ethernet1 = &usbnet;
-       };
-
-       /* fixed crystal dedicated to mcp2515 */
-       osc_can: clock-osc-can {
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-               clock-frequency = <16000000>;
-               clock-output-names = "osc-can";
-       };
-
-       leds {
-               compatible = "gpio-leds";
-               pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_gpio_led>;
-
-               led1 {
-                       label = "led1";
-                       gpios = <&gpio4 17 GPIO_ACTIVE_LOW>;
-                       linux,default-trigger = "heartbeat";
-               };
-
-               led2 {
-                       label = "led2";
-                       gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
-               };
-
-               led3 {
-                       label = "led3";
-                       gpios = <&gpio4 18 GPIO_ACTIVE_LOW>;
-               };
-
-               led4 {
-                       label = "led4";
-                       gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
-               };
-
-               led5 {
-                       label = "led5";
-                       gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
-               };
-
-               led6 {
-                       label = "led6";
-                       gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
-               };
-       };
-
-       pwm-beeper {
-               compatible = "pwm-beeper";
-               pwms = <&pwm2 0 5000 0>;
-       };
-
-       reg_rst_eth2: regulator-rst-eth2 {
-               compatible = "regulator-fixed";
-               regulator-name = "rst-usb-eth2";
-               pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_usb_eth2>;
-               gpio = <&gpio3 2 GPIO_ACTIVE_HIGH>;
-               enable-active-high;
-               regulator-always-on;
-       };
-
-       reg_vdd_5v: regulator-5v {
-               compatible = "regulator-fixed";
-               regulator-name = "vdd-5v";
-               regulator-min-microvolt = <5000000>;
-               regulator-max-microvolt = <5000000>;
-       };
-};
-
-&ecspi2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_ecspi2>;
-       cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
-       status = "okay";
-
-       can0: can@0 {
-               compatible = "microchip,mcp2515";
-               reg = <0>;
-               pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_can>;
-               clocks = <&osc_can>;
-               interrupt-parent = <&gpio4>;
-               interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
-               spi-max-frequency = <10000000>;
-               vdd-supply = <&reg_vdd_3v3>;
-               xceiver-supply = <&reg_vdd_5v>;
-       };
-};
-
-&ecspi3 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_ecspi3>;
-       cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>;
-       status = "okay";
-};
-
-&fec1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_enet>;
-       phy-connection-type = "rgmii-rxid";
-       phy-handle = <&ethphy>;
-       status = "okay";
-
-       mdio {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               ethphy: ethernet-phy@0 {
-                       reg = <0>;
-                       reset-assert-us = <1>;
-                       reset-deassert-us = <15000>;
-                       reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>;
-               };
-       };
-};
-
-&i2c4 {
-       clock-frequency = <100000>;
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_i2c4>;
-       status = "okay";
-
-       rtc@32 {
-               compatible = "epson,rx8900";
-               reg = <0x32>;
-       };
-};
-
-&pwm2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_pwm2>;
-       status = "okay";
-};
-
-&uart1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart1>;
-       uart-has-rtscts;
-       status = "okay";
-};
-
-&uart2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart2>;
-       linux,rs485-enabled-at-boot-time;
-       uart-has-rtscts;
-       status = "okay";
-};
-
-&usbotg1 {
-       dr_mode = "otg";
-       over-current-active-low;
-       status = "okay";
-};
-
-&usbotg2 {
-       dr_mode = "host";
-       disable-over-current;
-       #address-cells = <1>;
-       #size-cells = <0>;
-       status = "okay";
-
-       usb1@1 {
-               compatible = "usb424,9514";
-               reg = <1>;
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               usbnet: ethernet@1 {
-                       compatible = "usb424,ec00";
-                       reg = <1>;
-                       local-mac-address = [ 00 00 00 00 00 00 ];
-               };
-       };
-};
-
-&usdhc2 {
-       pinctrl-names = "default", "state_100mhz", "state_200mhz";
-       pinctrl-0 = <&pinctrl_usdhc2>;
-       pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
-       pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
-       vmmc-supply = <&reg_vdd_3v3>;
-       vqmmc-supply = <&reg_nvcc_sd>;
-       cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
-       status = "okay";
-};
-
-&iomuxc {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_gpio>;
-
-       pinctrl_can: cangrp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28               0x19
-               >;
-       };
-
-       pinctrl_ecspi2: ecspi2grp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO            0x82
-                       MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI            0x82
-                       MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK            0x82
-                       MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13              0x19
-               >;
-       };
-
-       pinctrl_ecspi3: ecspi3grp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_UART2_RXD_ECSPI3_MISO              0x82
-                       MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI              0x82
-                       MX8MM_IOMUXC_UART1_RXD_ECSPI3_SCLK              0x82
-                       MX8MM_IOMUXC_UART2_TXD_GPIO5_IO25               0x19
-               >;
-       };
-
-       pinctrl_enet: enetgrp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_ENET_MDC_ENET1_MDC                 0x3
-                       MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO               0x3
-                       MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3           0x1f
-                       MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2           0x1f
-                       MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1           0x1f
-                       MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0           0x1f
-                       MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3           0x91
-                       MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2           0x91
-                       MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1           0x91
-                       MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0           0x91
-                       MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC           0x1f
-                       MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC           0x91
-                       MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL     0x91
-                       MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL     0x1f
-                       MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27               0x19 /* PHY RST */
-                       MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25                0x19 /* ETH IRQ */
-               >;
-       };
-
-       pinctrl_gpio_led: gpioledgrp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16            0x19
-                       MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7                0x19
-                       MX8MM_IOMUXC_SAI1_RXD6_GPIO4_IO8                0x19
-                       MX8MM_IOMUXC_SAI1_RXD7_GPIO4_IO9                0x19
-                       MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17               0x19
-                       MX8MM_IOMUXC_SAI1_TXD6_GPIO4_IO18               0x19
-                       MX8MM_IOMUXC_SAI1_TXD7_GPIO4_IO19               0x19
-               >;
-       };
-
-       pinctrl_gpio: gpiogrp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3               0x19
-                       MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7               0x19
-                       MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9               0x19
-                       MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11              0x19
-                       MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6               0x19
-                       MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8               0x19
-                       MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10              0x19
-                       MX8MM_IOMUXC_SAI3_MCLK_GPIO5_IO2                0x19
-               >;
-       };
-
-       pinctrl_i2c4: i2c4grp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL                  0x400001c3
-                       MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA                  0x400001c3
-               >;
-       };
-
-       pinctrl_pwm2: pwm2grp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_SPDIF_RX_PWM2_OUT                  0x19
-               >;
-       };
-
-       pinctrl_uart1: uart1grp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX              0x140
-                       MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX             0x140
-                       MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B          0x140
-                       MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B          0x140
-               >;
-       };
-
-       pinctrl_uart2: uart2grp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX             0x140
-                       MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX              0x140
-                       MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B           0x140
-                       MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B           0x140
-               >;
-       };
-
-       pinctrl_usb_eth2: usbeth2grp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_NAND_CE1_B_GPIO3_IO2               0x19
-               >;
-       };
-
-       pinctrl_usdhc2: usdhc2grp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK                 0x190
-                       MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD                 0x1d0
-                       MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0             0x1d0
-                       MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1             0x1d0
-                       MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2             0x1d0
-                       MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3             0x1d0
-                       MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12                0x019
-               >;
-       };
-
-       pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK                 0x194
-                       MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD                 0x1d4
-                       MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0             0x1d4
-                       MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1             0x1d4
-                       MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2             0x1d4
-                       MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3             0x1d4
-                       MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12                0x019
-               >;
-       };
-
-       pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK                 0x196
-                       MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD                 0x1d6
-                       MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0             0x1d6
-                       MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1             0x1d6
-                       MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2             0x1d6
-                       MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3             0x1d6
-                       MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12                0x019
-               >;
-       };
-};
diff --git a/arch/arm/dts/imx8mm-kontron-n801x-som.dtsi b/arch/arm/dts/imx8mm-kontron-n801x-som.dtsi
deleted file mode 100644 (file)
index 39c0ce1..0000000
+++ /dev/null
@@ -1,316 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ OR MIT
-/*
- * Copyright (C) 2019 Kontron Electronics GmbH
- */
-
-#include "imx8mm.dtsi"
-
-/ {
-       model = "Kontron i.MX8MM N801X SoM";
-       compatible = "kontron,imx8mm-n801x-som", "fsl,imx8mm";
-
-       memory@40000000 {
-               device_type = "memory";
-               /*
-                * There are multiple SoM flavors with different DDR sizes.
-                * The smallest is 1GB. For larger sizes the bootloader will
-                * update the reg property.
-                */
-               reg = <0x0 0x40000000 0 0x80000000>;
-       };
-
-       chosen {
-               stdout-path = &uart3;
-       };
-};
-
-&A53_0 {
-       cpu-supply = <&reg_vdd_arm>;
-};
-
-&A53_1 {
-       cpu-supply = <&reg_vdd_arm>;
-};
-
-&A53_2 {
-       cpu-supply = <&reg_vdd_arm>;
-};
-
-&A53_3 {
-       cpu-supply = <&reg_vdd_arm>;
-};
-
-&ddrc {
-       operating-points-v2 = <&ddrc_opp_table>;
-
-       ddrc_opp_table: opp-table {
-               compatible = "operating-points-v2";
-
-               opp-100M {
-                       opp-hz = /bits/ 64 <100000000>;
-               };
-
-               opp-750M {
-                       opp-hz = /bits/ 64 <750000000>;
-               };
-       };
-};
-
-&ecspi1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_ecspi1>;
-       cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
-       status = "okay";
-
-       flash@0 {
-               compatible = "mxicy,mx25r1635f", "jedec,spi-nor";
-               spi-max-frequency = <80000000>;
-               reg = <0>;
-
-               partitions {
-                       compatible = "fixed-partitions";
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-
-                       partition@0 {
-                               label = "u-boot";
-                               reg = <0x0 0x1e0000>;
-                       };
-
-                       partition@1e0000 {
-                               label = "env";
-                               reg = <0x1e0000 0x10000>;
-                       };
-
-                       partition@1f0000 {
-                               label = "env_redundant";
-                               reg = <0x1f0000 0x10000>;
-                       };
-               };
-       };
-};
-
-&i2c1 {
-       clock-frequency = <400000>;
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_i2c1>;
-       status = "okay";
-
-       pca9450: pmic@25 {
-               compatible = "nxp,pca9450a";
-               reg = <0x25>;
-               pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_pmic>;
-               interrupt-parent = <&gpio1>;
-               interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
-               sd-vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
-
-               regulators {
-                       reg_vdd_soc: BUCK1 {
-                               regulator-name = "buck1";
-                               regulator-min-microvolt = <800000>;
-                               regulator-max-microvolt = <850000>;
-                               regulator-boot-on;
-                               regulator-always-on;
-                               regulator-ramp-delay = <3125>;
-                               nxp,dvs-run-voltage = <850000>;
-                               nxp,dvs-standby-voltage = <800000>;
-                       };
-
-                       reg_vdd_arm: BUCK2 {
-                               regulator-name = "buck2";
-                               regulator-min-microvolt = <850000>;
-                               regulator-max-microvolt = <950000>;
-                               regulator-boot-on;
-                               regulator-always-on;
-                               regulator-ramp-delay = <3125>;
-                               nxp,dvs-run-voltage = <950000>;
-                               nxp,dvs-standby-voltage = <850000>;
-                       };
-
-                       reg_vdd_dram: BUCK3 {
-                               regulator-name = "buck3";
-                               regulator-min-microvolt = <850000>;
-                               regulator-max-microvolt = <950000>;
-                               regulator-boot-on;
-                               regulator-always-on;
-                       };
-
-                       reg_vdd_3v3: BUCK4 {
-                               regulator-name = "buck4";
-                               regulator-min-microvolt = <3300000>;
-                               regulator-max-microvolt = <3300000>;
-                               regulator-boot-on;
-                               regulator-always-on;
-                       };
-
-                       reg_vdd_1v8: BUCK5 {
-                               regulator-name = "buck5";
-                               regulator-min-microvolt = <1800000>;
-                               regulator-max-microvolt = <1800000>;
-                               regulator-boot-on;
-                               regulator-always-on;
-                       };
-
-                       reg_nvcc_dram: BUCK6 {
-                               regulator-name = "buck6";
-                               regulator-min-microvolt = <1100000>;
-                               regulator-max-microvolt = <1100000>;
-                               regulator-boot-on;
-                               regulator-always-on;
-                       };
-
-                       reg_nvcc_snvs: LDO1 {
-                               regulator-name = "ldo1";
-                               regulator-min-microvolt = <1800000>;
-                               regulator-max-microvolt = <1800000>;
-                               regulator-boot-on;
-                               regulator-always-on;
-                       };
-
-                       reg_vdd_snvs: LDO2 {
-                               regulator-name = "ldo2";
-                               regulator-min-microvolt = <800000>;
-                               regulator-max-microvolt = <900000>;
-                               regulator-boot-on;
-                               regulator-always-on;
-                       };
-
-                       reg_vdda: LDO3 {
-                               regulator-name = "ldo3";
-                               regulator-min-microvolt = <1800000>;
-                               regulator-max-microvolt = <1800000>;
-                               regulator-boot-on;
-                               regulator-always-on;
-                       };
-
-                       reg_vdd_phy: LDO4 {
-                               regulator-name = "ldo4";
-                               regulator-min-microvolt = <900000>;
-                               regulator-max-microvolt = <900000>;
-                               regulator-boot-on;
-                               regulator-always-on;
-                       };
-
-                       reg_nvcc_sd: LDO5 {
-                               regulator-name = "ldo5";
-                               regulator-min-microvolt = <1800000>;
-                               regulator-max-microvolt = <3300000>;
-                       };
-               };
-       };
-};
-
-&uart3 { /* console */
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart3>;
-       status = "okay";
-};
-
-&usdhc1 {
-       pinctrl-names = "default", "state_100mhz", "state_200mhz";
-       pinctrl-0 = <&pinctrl_usdhc1>;
-       pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
-       pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
-       vmmc-supply = <&reg_vdd_3v3>;
-       vqmmc-supply = <&reg_vdd_1v8>;
-       bus-width = <8>;
-       non-removable;
-       status = "okay";
-};
-
-&wdog1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_wdog>;
-       fsl,ext-reset-output;
-       status = "okay";
-};
-
-&iomuxc {
-       pinctrl_ecspi1: ecspi1grp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO            0x82
-                       MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI            0x82
-                       MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK            0x82
-                       MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9               0x19
-               >;
-       };
-
-       pinctrl_i2c1: i2c1grp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL                  0x400001c3
-                       MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA                  0x400001c3
-               >;
-       };
-
-       pinctrl_pmic: pmicgrp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0               0x141
-                       MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4               0x141
-               >;
-       };
-
-       pinctrl_uart3: uart3grp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX             0x140
-                       MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX             0x140
-               >;
-       };
-
-       pinctrl_usdhc1: usdhc1grp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK                 0x190
-                       MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD                 0x1d0
-                       MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0             0x1d0
-                       MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1             0x1d0
-                       MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2             0x1d0
-                       MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3             0x1d0
-                       MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4             0x1d0
-                       MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5             0x1d0
-                       MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6             0x1d0
-                       MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7             0x1d0
-                       MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B         0x019
-                       MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE           0x190
-               >;
-       };
-
-       pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK                 0x194
-                       MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD                 0x1d4
-                       MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0             0x1d4
-                       MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1             0x1d4
-                       MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2             0x1d4
-                       MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3             0x1d4
-                       MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4             0x1d4
-                       MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5             0x1d4
-                       MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6             0x1d4
-                       MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7             0x1d4
-                       MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B         0x019
-                       MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE           0x194
-               >;
-       };
-
-       pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK                 0x196
-                       MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD                 0x1d6
-                       MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0             0x1d6
-                       MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1             0x1d6
-                       MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2             0x1d6
-                       MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3             0x1d6
-                       MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4             0x1d6
-                       MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5             0x1d6
-                       MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6             0x1d6
-                       MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7             0x1d6
-                       MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B         0x019
-                       MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE           0x196
-               >;
-       };
-
-       pinctrl_wdog: wdoggrp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B            0xc6
-               >;
-       };
-};
diff --git a/arch/arm/dts/imx8mm-kontron-sl.dtsi b/arch/arm/dts/imx8mm-kontron-sl.dtsi
new file mode 100644 (file)
index 0000000..11a50cf
--- /dev/null
@@ -0,0 +1,316 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Copyright (C) 2019 Kontron Electronics GmbH
+ */
+
+#include "imx8mm.dtsi"
+
+/ {
+       model = "Kontron SL i.MX8MM (N801X SOM)";
+       compatible = "kontron,imx8mm-sl", "fsl,imx8mm";
+
+       memory@40000000 {
+               device_type = "memory";
+               /*
+                * There are multiple SoM flavors with different DDR sizes.
+                * The smallest is 1GB. For larger sizes the bootloader will
+                * update the reg property.
+                */
+               reg = <0x0 0x40000000 0 0x80000000>;
+       };
+
+       chosen {
+               stdout-path = &uart3;
+       };
+};
+
+&A53_0 {
+       cpu-supply = <&reg_vdd_arm>;
+};
+
+&A53_1 {
+       cpu-supply = <&reg_vdd_arm>;
+};
+
+&A53_2 {
+       cpu-supply = <&reg_vdd_arm>;
+};
+
+&A53_3 {
+       cpu-supply = <&reg_vdd_arm>;
+};
+
+&ddrc {
+       operating-points-v2 = <&ddrc_opp_table>;
+
+       ddrc_opp_table: opp-table {
+               compatible = "operating-points-v2";
+
+               opp-100M {
+                       opp-hz = /bits/ 64 <100000000>;
+               };
+
+               opp-750M {
+                       opp-hz = /bits/ 64 <750000000>;
+               };
+       };
+};
+
+&ecspi1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_ecspi1>;
+       cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
+       status = "okay";
+
+       flash@0 {
+               compatible = "mxicy,mx25r1635f", "jedec,spi-nor";
+               spi-max-frequency = <80000000>;
+               reg = <0>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "u-boot";
+                               reg = <0x0 0x1e0000>;
+                       };
+
+                       partition@1e0000 {
+                               label = "env";
+                               reg = <0x1e0000 0x10000>;
+                       };
+
+                       partition@1f0000 {
+                               label = "env_redundant";
+                               reg = <0x1f0000 0x10000>;
+                       };
+               };
+       };
+};
+
+&i2c1 {
+       clock-frequency = <400000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c1>;
+       status = "okay";
+
+       pca9450: pmic@25 {
+               compatible = "nxp,pca9450a";
+               reg = <0x25>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_pmic>;
+               interrupt-parent = <&gpio1>;
+               interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+               sd-vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
+
+               regulators {
+                       reg_vdd_soc: BUCK1 {
+                               regulator-name = "buck1";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <850000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                               regulator-ramp-delay = <3125>;
+                               nxp,dvs-run-voltage = <850000>;
+                               nxp,dvs-standby-voltage = <800000>;
+                       };
+
+                       reg_vdd_arm: BUCK2 {
+                               regulator-name = "buck2";
+                               regulator-min-microvolt = <850000>;
+                               regulator-max-microvolt = <950000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                               regulator-ramp-delay = <3125>;
+                               nxp,dvs-run-voltage = <950000>;
+                               nxp,dvs-standby-voltage = <850000>;
+                       };
+
+                       reg_vdd_dram: BUCK3 {
+                               regulator-name = "buck3";
+                               regulator-min-microvolt = <850000>;
+                               regulator-max-microvolt = <950000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       reg_vdd_3v3: BUCK4 {
+                               regulator-name = "buck4";
+                               regulator-min-microvolt = <3300000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       reg_vdd_1v8: BUCK5 {
+                               regulator-name = "buck5";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       reg_nvcc_dram: BUCK6 {
+                               regulator-name = "buck6";
+                               regulator-min-microvolt = <1100000>;
+                               regulator-max-microvolt = <1100000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       reg_nvcc_snvs: LDO1 {
+                               regulator-name = "ldo1";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       reg_vdd_snvs: LDO2 {
+                               regulator-name = "ldo2";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <900000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       reg_vdda: LDO3 {
+                               regulator-name = "ldo3";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       reg_vdd_phy: LDO4 {
+                               regulator-name = "ldo4";
+                               regulator-min-microvolt = <900000>;
+                               regulator-max-microvolt = <900000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       reg_nvcc_sd: LDO5 {
+                               regulator-name = "ldo5";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+               };
+       };
+};
+
+&uart3 { /* console */
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart3>;
+       status = "okay";
+};
+
+&usdhc1 {
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
+       pinctrl-0 = <&pinctrl_usdhc1>;
+       pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+       vmmc-supply = <&reg_vdd_3v3>;
+       vqmmc-supply = <&reg_vdd_1v8>;
+       bus-width = <8>;
+       non-removable;
+       status = "okay";
+};
+
+&wdog1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_wdog>;
+       fsl,ext-reset-output;
+       status = "okay";
+};
+
+&iomuxc {
+       pinctrl_ecspi1: ecspi1grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO            0x82
+                       MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI            0x82
+                       MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK            0x82
+                       MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9               0x19
+               >;
+       };
+
+       pinctrl_i2c1: i2c1grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL                  0x400001c3
+                       MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA                  0x400001c3
+               >;
+       };
+
+       pinctrl_pmic: pmicgrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0               0x141
+                       MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4               0x141
+               >;
+       };
+
+       pinctrl_uart3: uart3grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX             0x140
+                       MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX             0x140
+               >;
+       };
+
+       pinctrl_usdhc1: usdhc1grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK                 0x190
+                       MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD                 0x1d0
+                       MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0             0x1d0
+                       MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1             0x1d0
+                       MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2             0x1d0
+                       MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3             0x1d0
+                       MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4             0x1d0
+                       MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5             0x1d0
+                       MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6             0x1d0
+                       MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7             0x1d0
+                       MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B         0x019
+                       MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE           0x190
+               >;
+       };
+
+       pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK                 0x194
+                       MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD                 0x1d4
+                       MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0             0x1d4
+                       MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1             0x1d4
+                       MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2             0x1d4
+                       MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3             0x1d4
+                       MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4             0x1d4
+                       MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5             0x1d4
+                       MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6             0x1d4
+                       MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7             0x1d4
+                       MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B         0x019
+                       MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE           0x194
+               >;
+       };
+
+       pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK                 0x196
+                       MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD                 0x1d6
+                       MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0             0x1d6
+                       MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1             0x1d6
+                       MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2             0x1d6
+                       MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3             0x1d6
+                       MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4             0x1d6
+                       MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5             0x1d6
+                       MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6             0x1d6
+                       MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7             0x1d6
+                       MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B         0x019
+                       MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE           0x196
+               >;
+       };
+
+       pinctrl_wdog: wdoggrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B            0xc6
+               >;
+       };
+};
index 5e68ae0305ade768d4ac59be36e882937fb9dc11..e4e12d3f55890bd66cd72eb2fe6ccd636bbd5c9d 100644 (file)
@@ -1,7 +1,7 @@
 Kontron SL/BL i.MX8M Mini Boards (N801x)
 M:     Frieder Schrempf <frieder.schrempf@kontron.de>
 S:     Maintained
-F:     arch/arm/dts/imx8mm-kontron-n801x-*
+F:     arch/arm/dts/imx8mm-kontron*
 F:     board/kontron/sl-mx8mm
 F:     configs/kontron-sl-mx8mm_defconfig
 F:     doc/board/kontron/sl-mx8mm.rst
index affdc136e1013bd6cb7b1d942d4789007e735f82..00e63659f4a4f0f176bb96d062d03aafae5044af 100644 (file)
@@ -150,7 +150,8 @@ int do_board_detect(void)
 int board_fit_config_name_match(const char *name)
 {
        if (gd->board_type == BOARD_TYPE_KTN_N801X && is_imx8mm() &&
-           !strncmp(name, "imx8mm-kontron-n801x-s", 22))
+           (!strcmp(name, "imx8mm-kontron-n801x-s") ||
+            !strcmp(name, "imx8mm-kontron-bl")))
                return 0;
 
        return -1;
index f273f228303e3469309bad9c63af31f19703db4d..3b80ed2e142da771922b243c0b462931492a6426 100644 (file)
@@ -11,7 +11,7 @@ CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_IMX_CONFIG="board/kontron/sl-mx8mm/imximage.cfg"
 CONFIG_DM_GPIO=y
 CONFIG_SPL_DM_SPI=y
-CONFIG_DEFAULT_DEVICE_TREE="imx8mm-kontron-n801x-s"
+CONFIG_DEFAULT_DEVICE_TREE="imx8mm-kontron-bl"
 CONFIG_SPL_TEXT_BASE=0x7E1000
 CONFIG_TARGET_KONTRON_MX8MM=y
 CONFIG_SPL_MMC=y