]> git.baikalelectronics.ru Git - kernel.git/commitdiff
drm/amd/display: Use update plane and stream routine for DCN32x
authorRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Fri, 11 Aug 2023 21:07:04 +0000 (16:07 -0500)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 16 Aug 2023 16:27:23 +0000 (18:27 +0200)
commit dddde627807c22d6f15f4417eb395b13a1ca88f9 upstream

Sub-viewport (Subvp) feature is used for changing MCLK without causing
any display artifact, requiring special treatment from the plane and
stream perspective since DC needs to read data from the cache when using
subvp. However, the function dc_commit_updates_for_stream does not
provide all the support needed by this feature which will make this
function legacy at some point. For this reason, this commit enables
dc_update_planes_and_stream for ASICs that support this feature but
preserves the old behavior for other ASICs. However,
dc_update_planes_and_stream should replace dc_commit_updates_for_stream
for all ASICs since it does most of the tasks executed by
dc_commit_updates_for_stream with other extra operations, but we need to
run tests before making this change.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Co-developed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/amd/display/dc/core/dc.c

index 8c98430091762a16e03bbce00b0332b240f4629a..c9ed0346b88ce395a24e322f26a8272794f68072 100644 (file)
@@ -4002,6 +4002,18 @@ void dc_commit_updates_for_stream(struct dc *dc,
        struct dc_context *dc_ctx = dc->ctx;
        int i, j;
 
+       /* TODO: Since change commit sequence can have a huge impact,
+        * we decided to only enable it for DCN3x. However, as soon as
+        * we get more confident about this change we'll need to enable
+        * the new sequence for all ASICs.
+        */
+       if (dc->ctx->dce_version >= DCN_VERSION_3_2) {
+               dc_update_planes_and_stream(dc, srf_updates,
+                                           surface_count, stream,
+                                           stream_update);
+               return;
+       }
+
        stream_status = dc_stream_get_status(stream);
        context = dc->current_state;