refactor(cpufeat): rename ENABLE_SPE_FOR_LOWER_ELS to ENABLE_SPE_FOR_NS

At the moment we hardcode the SPE functionality to be available on the
non-secure side only, by setting MDCR_EL2.E2PB accordingly.

This should be reflected in the feature selection symbol, so rename that
to ENABLE_SPE_FOR_NS, to make it clearer that SPE is not supported in
the secure world.

Change-Id: I3f9b48eab1a45d6ccfcbb9c90a11eeb66867ad9a
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

diff --git a/Makefile b/Makefile
index b9ca664e919bb7a065d8088a6bca5f1de4e51644..16279b603d08fde60fc9d97fc79715f95244dbd4 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -1096,7 +1096,7 @@ $(eval $(call assert_booleans,\
         ENABLE_RUNTIME_INSTRUMENTATION \
         ENABLE_SME_FOR_NS \
         ENABLE_SME_FOR_SWD \
-        ENABLE_SPE_FOR_LOWER_ELS \
+        ENABLE_SPE_FOR_NS \
         ENABLE_SVE_FOR_NS \
         ENABLE_SVE_FOR_SWD \
         ERROR_DEPRECATED \
@@ -1237,7 +1237,7 @@ $(eval $(call add_defines,\
         ENABLE_RUNTIME_INSTRUMENTATION \
         ENABLE_SME_FOR_NS \
         ENABLE_SME_FOR_SWD \
-        ENABLE_SPE_FOR_LOWER_ELS \
+        ENABLE_SPE_FOR_NS \
         ENABLE_SVE_FOR_NS \
         ENABLE_SVE_FOR_SWD \
         ENCRYPT_BL31 \

diff --git a/bl31/bl31.mk b/bl31/bl31.mk
index e9590d5d6a30e2166b120f2d4fcd1310b29b14c4..b639920e59970e0f8f5b9843e73bef05bce5348c 100644 (file)
--- a/bl31/bl31.mk
+++ b/bl31/bl31.mk
@@ -87,7 +87,7 @@ BL31_SOURCES          +=      services/std_svc/trng/trng_main.c       \
                                services/std_svc/trng/trng_entropy_pool.c
 endif
 
-ifeq (${ENABLE_SPE_FOR_LOWER_ELS},1)
+ifeq (${ENABLE_SPE_FOR_NS},1)
 BL31_SOURCES           +=      lib/extensions/spe/spe.c
 endif
 

diff --git a/docs/getting_started/build-options.rst b/docs/getting_started/build-options.rst
index abfc8eccc5c1d7740b3769642a45b6e4d4b49576..9241c3912b477d0b069732721a06bec51151986c 100644 (file)
--- a/docs/getting_started/build-options.rst
+++ b/docs/getting_started/build-options.rst
@@ -428,7 +428,7 @@ Common build options
    handle context switching for SME, SVE, and FPU/SIMD registers to ensure that
    no data is leaked to non-secure world. This is experimental. Default is 0.
 
--  ``ENABLE_SPE_FOR_LOWER_ELS`` : Boolean option to enable Statistical Profiling
+-  ``ENABLE_SPE_FOR_NS`` : Boolean option to enable Statistical Profiling
    extensions. This is an optional architectural feature for AArch64.
    The default is 1 but is automatically disabled when the target architecture
    is AArch32.

diff --git a/lib/el3_runtime/aarch64/context_mgmt.c b/lib/el3_runtime/aarch64/context_mgmt.c
index e1c671d8ba48e30cf7bc109231c15241fe1be8c9..50fddc502245a6b922d618f9f60c9aeda94144df 100644 (file)
--- a/lib/el3_runtime/aarch64/context_mgmt.c
+++ b/lib/el3_runtime/aarch64/context_mgmt.c
@@ -482,7 +482,7 @@ void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep)
 static void manage_extensions_nonsecure(bool el2_unused, cpu_context_t *ctx)
 {
 #if IMAGE_BL31
-#if ENABLE_SPE_FOR_LOWER_ELS
+#if ENABLE_SPE_FOR_NS
        spe_enable(el2_unused);
 #endif
 

diff --git a/make_helpers/defaults.mk b/make_helpers/defaults.mk
index d8c621078cddc2b10ba616b5c5ba41b5aefa7bff..63ac82e6d10e2ec4a08b112af603b770b0e8b21a 100644 (file)
--- a/make_helpers/defaults.mk
+++ b/make_helpers/defaults.mk
@@ -355,11 +355,11 @@ V                         := 0
 WARMBOOT_ENABLE_DCACHE_EARLY   := 0
 
 # Build option to enable/disable the Statistical Profiling Extensions
-ENABLE_SPE_FOR_LOWER_ELS       := 1
+ENABLE_SPE_FOR_NS              := 1
 
 # SPE is only supported on AArch64 so disable it on AArch32.
 ifeq (${ARCH},aarch32)
-       override ENABLE_SPE_FOR_LOWER_ELS := 0
+       override ENABLE_SPE_FOR_NS := 0
 endif
 
 # Include Memory Tagging Extension registers in cpu context. This must be set

diff --git a/plat/allwinner/common/allwinner-common.mk b/plat/allwinner/common/allwinner-common.mk
index 61c1dbe3e04b561aa07d827f9ee384bbee6994b0..3164a255a0bd451f5fa7cd2579fb8ca74b76ddbf 100644 (file)
--- a/plat/allwinner/common/allwinner-common.mk
+++ b/plat/allwinner/common/allwinner-common.mk
@@ -87,7 +87,7 @@ endif
 COLD_BOOT_SINGLE_CPU           :=      1
 
 # Do not enable SPE (not supported on ARM v8.0).
-ENABLE_SPE_FOR_LOWER_ELS       :=      0
+ENABLE_SPE_FOR_NS              :=      0
 
 # Do not enable SVE (not supported on ARM v8.0).
 ENABLE_SVE_FOR_NS              :=      0

diff --git a/plat/arm/board/fvp/fvp_pm.c b/plat/arm/board/fvp/fvp_pm.c
index 6b9d6184ca90103210bdf2c76baa3ae61bc7609f..9d93862302709bd563233c08d76f342a0a475712 100644 (file)
--- a/plat/arm/board/fvp/fvp_pm.c
+++ b/plat/arm/board/fvp/fvp_pm.c
@@ -53,7 +53,7 @@ static void fvp_cluster_pwrdwn_common(void)
 {
        uint64_t mpidr = read_mpidr_el1();
 
-#if ENABLE_SPE_FOR_LOWER_ELS
+#if ENABLE_SPE_FOR_NS
        /*
         * On power down we need to disable statistical profiling extensions
         * before exiting coherency.

diff --git a/plat/arm/board/tc/platform.mk b/plat/arm/board/tc/platform.mk
index 05dca915e6a1024a5d68edb8b44596e4237639c1..5f4148c1709edc4fcda2ccaeda0eccff16f7a9e0 100644 (file)
--- a/plat/arm/board/tc/platform.mk
+++ b/plat/arm/board/tc/platform.mk
@@ -161,7 +161,7 @@ override CTX_INCLUDE_AARCH32_REGS   := 0
 
 override CTX_INCLUDE_PAUTH_REGS        := 1
 
-override ENABLE_SPE_FOR_LOWER_ELS      := 0
+override ENABLE_SPE_FOR_NS     := 0
 
 override ENABLE_AMU := 1
 override ENABLE_AMU_AUXILIARY_COUNTERS := 1

diff --git a/plat/qti/msm8916/platform.mk b/plat/qti/msm8916/platform.mk
index e516ceadb93dbc54ce063f80502734b41cd0b436..60fb25d412d441468a0ecb73cabb820169dec139 100644 (file)
--- a/plat/qti/msm8916/platform.mk
+++ b/plat/qti/msm8916/platform.mk
@@ -44,7 +44,7 @@ WARMBOOT_ENABLE_DCACHE_EARLY  := 1
 
 # Disable features unsupported in ARMv8.0
 ENABLE_AMU                     := 0
-ENABLE_SPE_FOR_LOWER_ELS       := 0
+ENABLE_SPE_FOR_NS              := 0
 ENABLE_SVE_FOR_NS              := 0
 
 # MSM8916 uses ARM Cortex-A53 r0p0 so likely all the errata apply