feat(sgi): configure SRAM and BL31 size for sgi platform

Update SRAM size for Neoverse reference design platforms from 256KB to
512KB. This is required to place and execute BL31 image from the
on-chip SRAM. Additionally, revise BL31 image size to accommodate
larger BL31 images of multi-chip platforms.

Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id: I11c2672a1089f24a9fafcf6555b8e1d52032cfde

diff --git a/plat/arm/css/sgi/include/sgi_base_platform_def.h b/plat/arm/css/sgi/include/sgi_base_platform_def.h
index 22870c4c9087c5b19251f8d273cf60f9cb07c307..c1fadc654e396f8bef7cd4c5c39678e1b8dc64a6 100644 (file)
--- a/plat/arm/css/sgi/include/sgi_base_platform_def.h
+++ b/plat/arm/css/sgi/include/sgi_base_platform_def.h
@@ -19,7 +19,7 @@
                                        CSS_SGI_MAX_CPUS_PER_CLUSTER *  \
                                        CSS_SGI_MAX_PE_PER_CPU)
 
-#define PLAT_ARM_TRUSTED_SRAM_SIZE     0x00040000      /* 256 KB */
+#define PLAT_ARM_TRUSTED_SRAM_SIZE     0x00080000      /* 512 KB */
 
 /* Remote chip address offset */
 #define CSS_SGI_REMOTE_CHIP_MEM_OFFSET(n)      \
@@ -99,10 +99,16 @@
 
 /*
  * Since BL31 NOBITS overlays BL2 and BL1-RW, PLAT_ARM_MAX_BL31_SIZE is
- * calculated using the current BL31 PROGBITS debug size plus the sizes of
- * BL2 and BL1-RW
+ * calculated using the current BL31 PROGBITS debug size plus the sizes of BL2
+ * and BL1-RW. CSS_SGI_BL31_SIZE - is tuned with respect to the actual BL31
+ * PROGBITS size which is around 64-68KB at the time this change is being made.
+ * A buffer of ~35KB is added to account for future expansion of the image,
+ * making it a total of 100KB.
  */
-#define PLAT_ARM_MAX_BL31_SIZE         0x48000
+#define CSS_SGI_BL31_SIZE              (100 * 1024)    /* 100 KB */
+#define PLAT_ARM_MAX_BL31_SIZE         (CSS_SGI_BL31_SIZE +            \
+                                               PLAT_ARM_MAX_BL2_SIZE + \
+                                               PLAT_ARM_MAX_BL1_RW_SIZE)
 
 /*
  * Size of cacheable stacks