* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
-#include <arm_gic.h>
#include <assert.h>
#include <bl_common.h>
#include <common_def.h>
#include <mcucfg.h>
#include <mmio.h>
#include <mtcmos.h>
+#include <plat_arm.h>
#include <plat_private.h>
#include <platform.h>
#include <spm.h>
generic_delay_timer_init();
/* Initialize the gic cpu and distributor interfaces */
- plat_mt_gic_init();
- arm_gic_setup();
+ plat_arm_gic_driver_init();
+ plat_arm_gic_init();
#if ENABLE_PLAT_COMPAT
/* Topologies are best known to the platform. */
*/
#include <cci.h>
-#include <gic_v2.h>
+#include <gic_common.h>
+#include <gicv2.h>
#include <mt8173_def.h>
.section .rodata.gic_reg_name, "aS"
void plat_cci_enable(void);
void plat_cci_disable(void);
-/* Declarations for plat_mt_gic.c */
-void plat_mt_gic_init(void);
-
/* Declarations for plat_topology.c */
int mt_setup_topology(void);
#ifndef __PLATFORM_DEF_H__
#define __PLATFORM_DEF_H__
+#include "mt8173_def.h"
+
/*******************************************************************************
* Platform binary types for linking
#define CACHE_WRITEBACK_SHIFT 6
#define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT)
+
+#define PLAT_ARM_GICD_BASE BASE_GICD_BASE
+#define PLAT_ARM_GICC_BASE BASE_GICC_BASE
+
+#define PLAT_ARM_G1S_IRQS MT_IRQ_SEC_SGI_0, \
+ MT_IRQ_SEC_SGI_1, \
+ MT_IRQ_SEC_SGI_2, \
+ MT_IRQ_SEC_SGI_3, \
+ MT_IRQ_SEC_SGI_4, \
+ MT_IRQ_SEC_SGI_5, \
+ MT_IRQ_SEC_SGI_6, \
+ MT_IRQ_SEC_SGI_7
+
+#define PLAT_ARM_G0_IRQS
+
#endif /* __PLATFORM_DEF_H__ */
*/
#include <arch_helpers.h>
-#include <arm_gic.h>
#include <assert.h>
#include <bakery_lock.h>
#include <cci.h>
#include <console.h>
#include <debug.h>
#include <errno.h>
+#include <gicv2.h>
#include <mcucfg.h>
#include <mmio.h>
#include <mt8173_def.h>
#include <mt_cpuxgpt.h> /* generic_timer_backup() */
+#include <plat_arm.h>
#include <plat_private.h>
#include <power_tracer.h>
#include <psci.h>
return;
/* Prevent interrupts from spuriously waking up this cpu */
- arm_gic_cpuif_deactivate();
+ gicv2_cpuif_disable();
spm_hotplug_off(mpidr);
unsigned long mpidr = read_mpidr_el1();
/* Prevent interrupts from spuriously waking up this cpu */
- arm_gic_cpuif_deactivate();
+ gicv2_cpuif_disable();
spm_hotplug_off(mpidr);
generic_timer_backup();
spm_system_suspend();
/* Prevent interrupts from spuriously waking up this cpu */
- arm_gic_cpuif_deactivate();
+ gicv2_cpuif_disable();
}
}
#else
generic_timer_backup();
spm_system_suspend();
/* Prevent interrupts from spuriously waking up this cpu */
- arm_gic_cpuif_deactivate();
+ gicv2_cpuif_disable();
}
}
#endif
}
/* Enable the gic cpu interface */
- arm_gic_cpuif_setup();
- arm_gic_pcpu_distif_setup();
+ gicv2_cpuif_enable();
+ gicv2_pcpu_distif_init();
trace_power_flow(mpidr, CPU_UP);
}
#else
return;
/* Enable the gic cpu interface */
- arm_gic_cpuif_setup();
- arm_gic_pcpu_distif_setup();
+ gicv2_cpuif_enable();
+ gicv2_pcpu_distif_init();
trace_power_flow(mpidr, CPU_UP);
}
#endif
if (afflvl >= MPIDR_AFFLVL2) {
/* Enable the gic cpu interface */
- arm_gic_setup();
- arm_gic_cpuif_setup();
+ plat_arm_gic_init();
spm_system_suspend_finish();
enable_scu(mpidr);
}
if (afflvl < MPIDR_AFFLVL2)
spm_mcdi_finish_for_on_state(mpidr, afflvl);
- arm_gic_pcpu_distif_setup();
+ gicv2_pcpu_distif_init();
}
#else
static void plat_power_domain_suspend_finish(const psci_power_state_t *state)
if (MTK_SYSTEM_PWR_STATE(state) == MTK_LOCAL_STATE_OFF) {
/* Enable the gic cpu interface */
- arm_gic_setup();
- arm_gic_cpuif_setup();
+ plat_arm_gic_init();
spm_system_suspend_finish();
enable_scu(mpidr);
}
spm_mcdi_finish_for_on_state(mpidr, MTK_PWR_LVL1);
}
- arm_gic_pcpu_distif_setup();
+ gicv2_pcpu_distif_init();
}
#endif
/* Assert system power domain is available on the platform */
assert(PLAT_MAX_PWR_LVL >= MTK_PWR_LVL2);
- arm_gic_cpuif_setup();
- arm_gic_pcpu_distif_setup();
+ plat_arm_gic_init();
}
#endif
PLAT_INCLUDES := -I${MTK_PLAT}/common/ \
-I${MTK_PLAT}/common/drivers/uart/ \
+ -Iinclude/plat/arm/common \
+ -Iinclude/plat/arm/common/aarch64 \
-I${MTK_PLAT_SOC}/drivers/crypt/ \
-I${MTK_PLAT_SOC}/drivers/mtcmos/ \
-I${MTK_PLAT_SOC}/drivers/pmic/ \
PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \
lib/xlat_tables/aarch64/xlat_tables.c \
plat/common/aarch64/plat_common.c \
- plat/common/plat_gic.c
+ plat/arm/common/arm_gicv2.c \
+ plat/common/plat_gicv2.c
BL31_SOURCES += drivers/arm/cci/cci.c \
- drivers/arm/gic/arm_gic.c \
- drivers/arm/gic/gic_v2.c \
- drivers/arm/gic/gic_v3.c \
+ drivers/arm/gic/common/gic_common.c \
+ drivers/arm/gic/v2/gicv2_main.c \
+ drivers/arm/gic/v2/gicv2_helpers.c \
drivers/console/aarch64/console.S \
drivers/delay_timer/delay_timer.c \
drivers/delay_timer/generic_delay_timer.c \
${MTK_PLAT_SOC}/drivers/spm/spm_mcdi.c \
${MTK_PLAT_SOC}/drivers/spm/spm_suspend.c \
${MTK_PLAT_SOC}/drivers/timer/mt_cpuxgpt.c \
- ${MTK_PLAT_SOC}/plat_mt_gic.c \
${MTK_PLAT_SOC}/plat_pm.c \
${MTK_PLAT_SOC}/plat_sip_calls.c \
${MTK_PLAT_SOC}/plat_topology.c \