fix(cpus): workaround for Cortex-A710 erratum 2291219

Cortex-A710 erratum 2291219 is a Cat B erratum that applies to revisions
r0p0, r1p0, and r2p0, and is fixed in r2p1. The workaround is to set
CPUACTLR2_EL1[36] to 1 before the power down sequence that sets
CORE_PWRDN_EN. This allows the cpu to retry the power down and prevents
the deadlock. TF-A never clears this bit even if it wakes up from the
wfi in the sequence since it is not expected to do anything but retry to
power down after and the bit is cleared on reset.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1775101/latest

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I7d3a97dfac0c433c0be386c1f3d2f2e895a3f691

diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst
index 91f712aaf3814eecbfdd0caa3f7a08320b08ca7d..7ba79b9ad6ccea3dc271cc5d1e7b6e77d51e7a09 100644 (file)
--- a/docs/design/cpu-specific-build-macros.rst
+++ b/docs/design/cpu-specific-build-macros.rst
@@ -495,6 +495,10 @@ For Cortex-A710, the following errata build flags are defined :
    Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
    of the CPU and is fixed in r2p1.
 
+- ``ERRATA_A710_2291219``: This applies errata 2291219 workaround to
+   Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
+   of the CPU and is fixed in r2p1.
+
 -  ``ERRATA_A710_2008768``: This applies errata 2008768 workaround to
    Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
    of the CPU and is fixed in r2p1.

diff --git a/include/lib/cpus/aarch64/cortex_a710.h b/include/lib/cpus/aarch64/cortex_a710.h
index e33b9d51823aead53106977743981ceb39b24024..432e17aba41b65efbdaacc60192c4516995894df 100644 (file)
--- a/include/lib/cpus/aarch64/cortex_a710.h
+++ b/include/lib/cpus/aarch64/cortex_a710.h
@@ -36,6 +36,7 @@
  ******************************************************************************/
 #define CORTEX_A710_CPUACTLR2_EL1                              S3_0_C15_C1_1
 #define CORTEX_A710_CPUACTLR2_EL1_BIT_40                       (ULL(1) << 40)
+#define CORTEX_A710_CPUACTLR2_EL1_BIT_36                       (ULL(1) << 36)
 
 /*******************************************************************************
  * CPU Auxiliary Control register 5 specific definitions.

diff --git a/lib/cpus/aarch64/cortex_a710.S b/lib/cpus/aarch64/cortex_a710.S
index 77f7a8dd82b8ecaa2e46ab951a41c97709f54219..fed3f33a81f6f88047f7fe75d841ffec219e8d2d 100644 (file)
--- a/lib/cpus/aarch64/cortex_a710.S
+++ b/lib/cpus/aarch64/cortex_a710.S
@@ -383,6 +383,34 @@ func check_errata_2282622
        b       cpu_rev_var_ls
 endfunc check_errata_2282622
 
+/* ------------------------------------------------------------------------
+ * Errata Workaround for Cortex-A710 Erratum 2291219 on power down request.
+ * This applies to revision <= r2p0 and is fixed in r2p1.
+ * Inputs:
+ * x0: variant[4:7] and revision[0:3] of current cpu.
+ * Shall clobber: x0-x1, x17
+ * ------------------------------------------------------------------------
+ */
+func errata_a710_2291219_wa
+       /* Check revision. */
+       mov     x17, x30
+       bl      check_errata_2291219
+       cbz     x0, 1f
+
+       /* Set bit 36 in ACTLR2_EL1 */
+       mrs     x1, CORTEX_A710_CPUACTLR2_EL1
+       orr     x1, x1, #CORTEX_A710_CPUACTLR2_EL1_BIT_36
+       msr     CORTEX_A710_CPUACTLR2_EL1, x1
+1:
+       ret     x17
+endfunc errata_a710_2291219_wa
+
+func check_errata_2291219
+       /* Applies to <= r2p0. */
+       mov     x1, #0x20
+       b       cpu_rev_var_ls
+endfunc check_errata_2291219
+
 /* ---------------------------------------------------------------
  * Errata Workaround for Cortex-A710 Erratum 2008768.
  * This applies to revision r0p0, r1p0 and r2p0.
@@ -476,6 +504,13 @@ func cortex_a710_core_pwr_dwn
        mov     x30, x4
 #endif
 
+#if ERRATA_A710_2291219
+       mov     x15, x30
+       bl      cpu_get_rev_var
+       bl      errata_a710_2291219_wa
+       mov     x30, x15
+#endif /* ERRATA_A710_2291219 */
+
        /* ---------------------------------------------------
         * Enable CPU power down bit in power control register
         * ---------------------------------------------------
@@ -513,6 +548,7 @@ func cortex_a710_errata_report
        report_errata ERRATA_A710_2008768, cortex_a710, 2008768
        report_errata ERRATA_A710_2147715, cortex_a710, 2147715
        report_errata ERRATA_A710_2216384, cortex_a710, 2216384
+       report_errata ERRATA_A710_2291219, cortex_a710, 2291219
        report_errata ERRATA_A710_2371105, cortex_a710, 2371105
        report_errata WORKAROUND_CVE_2022_23960, cortex_a710, cve_2022_23960
        report_errata ERRATA_DSU_2313941, cortex_a710, dsu_2313941

diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk
index dcc6fd125eeedb462635a9974cb01bc6700a8b11..b4421dda3d8004e7ca8b517d51c4593400189b8c 100644 (file)
--- a/lib/cpus/cpu-ops.mk
+++ b/lib/cpus/cpu-ops.mk
@@ -548,6 +548,10 @@ ERRATA_A710_2216384        ?=0
 # to revision r0p0, r1p0 and r2p0 of the Cortex-A710 cpu and is fixed in r2p1.
 ERRATA_A710_2282622    ?=0
 
+# Flag to apply erratum 2291219 workaround during reset. This erratum applies
+# to revision r0p0, r1p0 and r2p0 of the Cortex-A710 cpu and is fixed in r2p1.
+ERRATA_A710_2291219    ?=0
+
 # Flag to apply erratum 2008768 workaround during reset. This erratum applies
 # to revision r0p0, r1p0 and r2p0 of the Cortex-A710 cpu and is fixed in r2p1.
 ERRATA_A710_2008768    ?=0
@@ -1164,6 +1168,10 @@ $(eval $(call add_define,ERRATA_A710_2216384))
 $(eval $(call assert_boolean,ERRATA_A710_2282622))
 $(eval $(call add_define,ERRATA_A710_2282622))
 
+# Process ERRATA_A710_2291219 flag
+$(eval $(call assert_boolean,ERRATA_A710_2291219))
+$(eval $(call add_define,ERRATA_A710_2291219))
+
 # Process ERRATA_A710_2008768 flag
 $(eval $(call assert_boolean,ERRATA_A710_2008768))
 $(eval $(call add_define,ERRATA_A710_2008768))