refactor(cpufeat): align FEAT_SEL2 to new feature handling

In ARMv8.4, the EL2 exception level got added to the secure world.
Adapt and rename the existing is_armv8_4_sel2_present() function, to
align its handling with the other CPU features.

Change-Id: If11e1942fdeb63c63f36ab9e89be810347d1a952
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

diff --git a/common/feat_detect.c b/common/feat_detect.c
index 1c505e211fc3040bb3d2c4484416f5ee7b404e35..0f66157b37d9c9d1274e95636e04d5b23a156f36 100644 (file)
--- a/common/feat_detect.c
+++ b/common/feat_detect.c
@@ -90,16 +90,6 @@ static void read_feat_dit(void)
 #endif
 }
 
-/***********************************
- * Feature : FEAT_SEL2 (Secure EL2)
- **********************************/
-static void read_feat_sel2(void)
-{
-#if (ENABLE_FEAT_SEL2 == FEAT_STATE_ALWAYS)
-       feat_detect_panic(is_armv8_4_sel2_present(), "SEL2");
-#endif
-}
-
 /************************************************
  * Feature : FEAT_MTE (Memory Tagging Extension)
  ***********************************************/
@@ -213,7 +203,8 @@ void detect_arch_features(void)
                      "MPAM", 1, 17);
        check_feature(CTX_INCLUDE_NEVE_REGS, read_feat_nv_id_field(),
                      "NV2", 2, 2);
-       read_feat_sel2();
+       check_feature(ENABLE_FEAT_SEL2, read_feat_sel2_id_field(),
+                     "SEL2", 1, 1);
        check_feature(ENABLE_TRF_FOR_NS, read_feat_trf_id_field(),
                      "TRF", 1, 1);
 

diff --git a/include/arch/aarch64/arch_features.h b/include/arch/aarch64/arch_features.h
index 72927fbf9aaebe07753164d53cb6ea5a979bba8a..03b005d1e35a37c1df4ff2425f2d8e5792998765 100644 (file)
--- a/include/arch/aarch64/arch_features.h
+++ b/include/arch/aarch64/arch_features.h
@@ -113,10 +113,22 @@ static inline unsigned int get_armv8_5_mte_support(void)
                ID_AA64PFR1_EL1_MTE_MASK);
 }
 
-static inline bool is_armv8_4_sel2_present(void)
+static inline unsigned int read_feat_sel2_id_field(void)
 {
-       return ((read_id_aa64pfr0_el1() >> ID_AA64PFR0_SEL2_SHIFT) &
-               ID_AA64PFR0_SEL2_MASK) == 1ULL;
+       return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_SEL2);
+}
+
+static inline bool is_feat_sel2_supported(void)
+{
+       if (ENABLE_FEAT_SEL2 == FEAT_STATE_DISABLED) {
+               return false;
+       }
+
+       if (ENABLE_FEAT_SEL2 == FEAT_STATE_ALWAYS) {
+               return true;
+       }
+
+       return read_feat_sel2_id_field() != 0U;
 }
 
 static inline unsigned int read_feat_twed_id_field(void)

diff --git a/lib/el3_runtime/aarch64/context_mgmt.c b/lib/el3_runtime/aarch64/context_mgmt.c
index 2ba2f9ce2497ff08bf9d566fb852baaebb2c5e6b..04b685f2d70778462d138562e8fe6b24ccc03373 100644 (file)
--- a/lib/el3_runtime/aarch64/context_mgmt.c
+++ b/lib/el3_runtime/aarch64/context_mgmt.c
@@ -134,7 +134,7 @@ static void setup_secure_context(cpu_context_t *ctx, const struct entry_point_in
 #endif /* CTX_INCLUDE_MTE_REGS */
 
        /* Enable S-EL2 if the next EL is EL2 and S-EL2 is present */
-       if ((GET_EL(ep->spsr) == MODE_EL2) && is_armv8_4_sel2_present()) {
+       if ((GET_EL(ep->spsr) == MODE_EL2) && is_feat_sel2_supported()) {
                if (GET_RW(ep->spsr) != MODE_RW_64) {
                        ERROR("S-EL2 can not be used in AArch32\n.");
                        panic();

diff --git a/plat/arm/board/fvp/platform.mk b/plat/arm/board/fvp/platform.mk
index ef62e731bf94e56751d3d2d559df025538a26ea0..d9cca5ec1918204142fd403025d5aac10a9f7247 100644 (file)
--- a/plat/arm/board/fvp/platform.mk
+++ b/plat/arm/board/fvp/platform.mk
@@ -474,6 +474,7 @@ CTX_INCLUDE_NEVE_REGS               := 2
 ENABLE_FEAT_CSV2_2             := 2
 ENABLE_FEAT_ECV                        := 2
 ENABLE_FEAT_PAN                        := 2
+ENABLE_FEAT_SEL2               := 2
 ENABLE_FEAT_TWED               := 2
 ENABLE_FEAT_VHE                        := 2
 ENABLE_MPAM_FOR_LOWER_ELS      := 2

diff --git a/services/std_svc/spmd/spmd_main.c b/services/std_svc/spmd/spmd_main.c
index e85109dfa77aaec6cae8b4bfa510c45aec6cc488..0e1899edefd9414143294ff61db17657a8c22542 100644 (file)
--- a/services/std_svc/spmd/spmd_main.c
+++ b/services/std_svc/spmd/spmd_main.c
@@ -399,7 +399,7 @@ static int spmd_spmc_init(void *pm_addr)
         * Check if S-EL2 is supported on this system if S-EL2
         * is required for SPM
         */
-       if (!is_armv8_4_sel2_present()) {
+       if (!is_feat_sel2_supported()) {
                WARN("SPM Core run time S-EL2 is not supported.\n");
                return -EINVAL;
        }