COT_DESC_IN_DTB \
USE_SP804_TIMER \
PSA_FWU_SUPPORT \
- ENABLE_SYS_REG_TRACE_FOR_NS \
ENABLE_MPMM \
ENABLE_MPMM_FCONF \
SIMICS_BUILD \
ENABLE_MPAM_FOR_LOWER_ELS \
ENABLE_RME \
ENABLE_SPE_FOR_NS \
+ ENABLE_SYS_REG_TRACE_FOR_NS \
ENABLE_TRF_FOR_NS \
FW_ENC_STATUS \
NR_OF_FW_BANKS \
BL31_SOURCES += lib/extensions/brbe/brbe.c
endif
-ifeq (${ENABLE_SYS_REG_TRACE_FOR_NS},1)
+ifneq (${ENABLE_SYS_REG_TRACE_FOR_NS},0)
BL31_SOURCES += lib/extensions/sys_reg_trace/aarch64/sys_reg_trace.c
endif
services/std_svc/trng/trng_entropy_pool.c
endif
-ifeq (${ENABLE_SYS_REG_TRACE_FOR_NS},1)
+ifneq (${ENABLE_SYS_REG_TRACE_FOR_NS},0)
BL32_SOURCES += lib/extensions/sys_reg_trace/aarch32/sys_reg_trace.c
endif
``FEATURE_DETECTION`` mechanism. The default is 0 and it is automatically
disabled when the target architecture is AArch32.
-- ``ENABLE_SYS_REG_TRACE_FOR_NS``: Boolean option to enable trace system
+- ``ENABLE_SYS_REG_TRACE_FOR_NS``: Numeric value to enable trace system
registers access from NS ELs, NS-EL2 or NS-EL1 (when NS-EL2 is implemented
but unused). This feature is available if trace unit such as ETMv4.x, and
- ETE(extending ETM feature) is implemented. This flag is disabled by default.
+ ETE(extending ETM feature) is implemented. This flag can take the values
+ 0 to 2, to align with the ``FEATURE_DETECTION`` mechanism. The default is 0.
- ``ENABLE_TRF_FOR_NS``: Numeric value to enable trace filter control registers
access from NS ELs, NS-EL2 or NS-EL1 (when NS-EL2 is implemented but unused),
return read_feat_trf_id_field() != 0U;
}
+static inline unsigned int read_feat_coptrc_id_field(void)
+{
+ return ISOLATE_FIELD(read_id_dfr0(), ID_DFR0_COPTRC);
+}
+
+static inline bool is_feat_sys_reg_trace_supported(void)
+{
+ if (ENABLE_SYS_REG_TRACE_FOR_NS == FEAT_STATE_DISABLED) {
+ return false;
+ }
+
+ if (ENABLE_SYS_REG_TRACE_FOR_NS == FEAT_STATE_ALWAYS) {
+ return true;
+ }
+
+ return read_feat_coptrc_id_field() != 0U;
+}
+
static inline bool is_feat_spe_supported(void)
{
/* FEAT_SPE is AArch64 only */
ID_AA64PFR0_DIT_MASK) == ID_AA64PFR0_DIT_SUPPORTED);
}
+static inline unsigned int read_feat_tracever_id_field(void)
+{
+ return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEVER);
+}
+
+static inline bool is_feat_sys_reg_trace_supported(void)
+{
+ if (ENABLE_SYS_REG_TRACE_FOR_NS == FEAT_STATE_DISABLED) {
+ return false;
+ }
+
+ if (ENABLE_SYS_REG_TRACE_FOR_NS == FEAT_STATE_ALWAYS) {
+ return true;
+ }
+
+ return read_feat_tracever_id_field() != 0U;
+}
+
/*************************************************************************
* Function to identify the presence of FEAT_TRF (TraceLift)
************************************************************************/
#include <context.h>
+#if ENABLE_SYS_REG_TRACE_FOR_NS
#if __aarch64__
void sys_reg_trace_enable(cpu_context_t *context);
#else
void sys_reg_trace_enable(void);
#endif /* __aarch64__ */
+#else /* !ENABLE_SYS_REG_TRACE_FOR_NS */
+
+#if __aarch64__
+static inline void sys_reg_trace_enable(cpu_context_t *context)
+{
+}
+#else
+static inline void sys_reg_trace_enable(void)
+{
+}
+#endif /* __aarch64__ */
+#endif /* ENABLE_SYS_REG_TRACE_FOR_NS */
+
#endif /* SYS_REG_TRACE_H */
amu_enable(el2_unused);
#endif
-#if ENABLE_SYS_REG_TRACE_FOR_NS
- sys_reg_trace_enable();
-#endif /* ENABLE_SYS_REG_TRACE_FOR_NS */
+ if (is_feat_sys_reg_trace_supported()) {
+ sys_reg_trace_enable();
+ }
if (is_feat_trf_supported()) {
trf_enable();
brbe_enable();
}
-#if ENABLE_SYS_REG_TRACE_FOR_NS
- sys_reg_trace_enable(ctx);
-#endif /* ENABLE_SYS_REG_TRACE_FOR_NS */
+ if (is_feat_sys_reg_trace_supported()) {
+ sys_reg_trace_enable(ctx);
+ }
if (is_feat_trf_supported()) {
trf_enable();
#include <arch_helpers.h>
#include <lib/extensions/sys_reg_trace.h>
-static bool sys_reg_trace_supported(void)
-{
- uint32_t features;
-
- features = read_id_dfr0() >> ID_DFR0_COPTRC_SHIFT;
- return ((features & ID_DFR0_COPTRC_MASK) ==
- ID_DFR0_COPTRC_SUPPORTED);
-}
-
void sys_reg_trace_enable(void)
{
uint32_t val;
- if (sys_reg_trace_supported()) {
- /*
- * NSACR.NSTRCDIS = b0
- * enable NS system register access to implemented trace
- * registers.
- */
- val = read_nsacr();
- val &= ~NSTRCDIS_BIT;
- write_nsacr(val);
- }
+ /*
+ * NSACR.NSTRCDIS = b0
+ * enable NS system register access to implemented trace
+ * registers.
+ */
+ val = read_nsacr();
+ val &= ~NSTRCDIS_BIT;
+ write_nsacr(val);
}
#include <arch_helpers.h>
#include <lib/extensions/sys_reg_trace.h>
-static bool sys_reg_trace_supported(void)
-{
- uint64_t features;
-
- features = read_id_aa64dfr0_el1() >> ID_AA64DFR0_TRACEVER_SHIFT;
- return ((features & ID_AA64DFR0_TRACEVER_MASK) ==
- ID_AA64DFR0_TRACEVER_SUPPORTED);
-}
-
void sys_reg_trace_enable(cpu_context_t *ctx)
{
uint64_t val;
- if (sys_reg_trace_supported()) {
- /* Retrieve CPTR_EL3 value from the given context 'ctx',
- * and update CPTR_EL3.TTA bit to 0.
- * This function is called while switching context to NS to
- * allow system trace register access to NS-EL2 and NS-EL1
- * when NS-EL2 is implemented but not used.
- */
- val = read_ctx_reg(get_el3state_ctx(ctx), CTX_CPTR_EL3);
- val &= ~TTA_BIT;
- write_ctx_reg(get_el3state_ctx(ctx), CTX_CPTR_EL3, val);
- }
+ /* Retrieve CPTR_EL3 value from the given context 'ctx',
+ * and update CPTR_EL3.TTA bit to 0.
+ * This function is called while switching context to NS to
+ * allow system trace register access to NS-EL2 and NS-EL1
+ * when NS-EL2 is implemented but not used.
+ */
+ val = read_ctx_reg(get_el3state_ctx(ctx), CTX_CPTR_EL3);
+ val &= ~TTA_BIT;
+ write_ctx_reg(get_el3state_ctx(ctx), CTX_CPTR_EL3, val);
}
endif
# enable trace system registers access to NS by default
-ENABLE_SYS_REG_TRACE_FOR_NS := 1
+ENABLE_SYS_REG_TRACE_FOR_NS := 2
# enable trace filter control registers access to NS by default
ENABLE_TRF_FOR_NS := 2