]> git.baikalelectronics.ru Git - arm-tf.git/commitdiff
xilinx: versal: PLM to ATF handover
authorVenkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Thu, 23 Jan 2020 04:23:20 +0000 (21:23 -0700)
committerVenkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Thu, 23 Jan 2020 10:01:22 +0000 (03:01 -0700)
Parse the parameter structure the PLM populates, to populate the
bl32 and bl33 image structures.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I317072d1086f6cc6f90883c1b8b6d086ff57b443

docs/plat/xilinx-versal.rst
plat/xilinx/versal/aarch64/versal_common.c
plat/xilinx/versal/bl31_versal_setup.c
plat/xilinx/versal/include/platform_def.h
plat/xilinx/versal/include/versal_def.h
plat/xilinx/versal/platform.mk

index 95c89a8b29f9c77c6c529258f85eb8f39d951e37..57a363bc952cf98f04aa73dd6797edfdc9a5d32d 100644 (file)
@@ -33,3 +33,11 @@ Xilinx Versal platform specific build options
 
 *   `VERSAL_PLATFORM`: Select the platform. Options:
     -   `versal_virt`  : Versal Virtual platform
+
+# PLM->TF-A Parameter Passing
+------------------------------
+The PLM populates a data structure with image information for the TF-A. The TF-A
+uses that data to hand off to the loaded images. The address of the handoff
+data structure is passed in the ```PMC_GLOBAL_GLOB_GEN_STORAGE4``` register.
+The register is free to be used by other software once the TF-A is bringing up
+further firmware images.
index 825421e2976bf8180a43b578e3210a7d754240c6..2fa847658412c44d6c87b096ef3ce9356812b25b 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -67,11 +67,3 @@ unsigned int plat_get_syscnt_freq2(void)
        return VERSAL_CPU_CLOCK;
 }
 
-uintptr_t plat_get_ns_image_entrypoint(void)
-{
-#ifdef PRELOADED_BL33_BASE
-       return PRELOADED_BL33_BASE;
-#else
-       return PLAT_VERSAL_NS_IMAGE_OFFSET;
-#endif
-}
index 6b56307af3f11a29f37abfe51d43645e8aa5314a..a5cf05e9afd2759819a69b3acc38a438d29e1a46 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
 #include <common/debug.h>
 #include <drivers/arm/pl011.h>
 #include <drivers/console.h>
+#include <lib/mmio.h>
 #include <lib/xlat_tables/xlat_tables.h>
 #include <plat/common/platform.h>
+#include <versal_def.h>
+#include <plat_private.h>
+#include <plat_startup.h>
 
 static entry_point_info_t bl32_image_ep_info;
 static entry_point_info_t bl33_image_ep_info;
@@ -36,6 +40,18 @@ entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
        return &bl32_image_ep_info;
 }
 
+/*
+ * Set the build time defaults,if we can't find any config data.
+ */
+static inline void bl31_set_default_config(void)
+{
+       bl32_image_ep_info.pc = BL32_BASE;
+       bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry();
+       bl33_image_ep_info.pc = plat_get_ns_image_entrypoint();
+       bl33_image_ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
+                                       DISABLE_ALL_EXCEPTIONS);
+}
+
 /*
  * Perform any BL31 specific platform actions. Here is an opportunity to copy
  * parameters passed by the calling EL (S-EL1 in BL2 & S-EL3 in BL1) before they
@@ -45,6 +61,7 @@ entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
                                u_register_t arg2, u_register_t arg3)
 {
+       uint64_t atf_handoff_addr;
 
        /* Initialize the console to provide early debug support */
        int rc = console_pl011_register(VERSAL_UART_BASE,
@@ -76,12 +93,15 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
        SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0);
        SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE);
 
-       /* use build time defaults in JTAG boot mode */
-       bl32_image_ep_info.pc = BL32_BASE;
-       bl32_image_ep_info.spsr = 0;
-       bl33_image_ep_info.pc = plat_get_ns_image_entrypoint();
-       bl33_image_ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
-                                         DISABLE_ALL_EXCEPTIONS);
+       atf_handoff_addr = mmio_read_32(PMC_GLOBAL_GLOB_GEN_STORAGE4);
+       enum fsbl_handoff ret = fsbl_atf_handover(&bl32_image_ep_info,
+                                                 &bl33_image_ep_info,
+                                                 atf_handoff_addr);
+       if (ret == FSBL_HANDOFF_NO_STRUCT) {
+               bl31_set_default_config();
+       } else if (ret != FSBL_HANDOFF_SUCCESS) {
+               panic();
+       }
 
        NOTICE("BL31: Secure code at 0x%lx\n", bl32_image_ep_info.pc);
        NOTICE("BL31: Non secure code at 0x%lx\n", bl33_image_ep_info.pc);
index bcc7a936433246f6f336abf4672df24cda87d5cd..9f8392ce91dcac6906503a41095fce93ac2924ad 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -56,9 +56,9 @@
  * BL33 specific defines.
  ******************************************************************************/
 #ifndef PRELOADED_BL33_BASE
-# define PLAT_VERSAL_NS_IMAGE_OFFSET   0x8000000
+# define PLAT_ARM_NS_IMAGE_BASE                0x8000000
 #else
-# define PLAT_VERSAL_NS_IMAGE_OFFSET   PRELOADED_BL33_BASE
+# define PLAT_ARM_NS_IMAGE_BASE                PRELOADED_BL33_BASE
 #endif
 
 /*******************************************************************************
index 94bd321b815f8e73a986fb290432c8fc2303cf3d..9a9b7c01783ed6202f74c8d000eb2f3c2d28e627 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
 #define APU_0_PWRCTL_CPUPWRDWNREQ_MASK 1
 #define APU_1_PWRCTL_CPUPWRDWNREQ_MASK 2
 
+/* PMC registers and bitfields */
+#define PMC_GLOBAL_BASE                        0xF1110000
+#define PMC_GLOBAL_GLOB_GEN_STORAGE4   (PMC_GLOBAL_BASE + 0x40)
+
 /* IPI registers and bitfields */
 #define IPI0_REG_BASE          0xFF330000
 #define IPI0_TRIG_BIT          (1 << 2)
index 7a8bfa31aed1ed9d4a32389bcd385e3ceca65e50..1e231cce8f6ef5f2577658b118165003126cddbe 100644 (file)
@@ -1,4 +1,4 @@
-# Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
 #
 # SPDX-License-Identifier: BSD-3-Clause
 
@@ -55,6 +55,7 @@ PLAT_BL_COMMON_SOURCES        :=      lib/xlat_tables/xlat_tables_common.c            \
                                drivers/arm/pl011/aarch64/pl011_console.S       \
                                plat/common/aarch64/crash_console_helpers.S     \
                                plat/arm/common/arm_cci.c                       \
+                               plat/arm/common/arm_common.c                    \
                                plat/common/plat_gicv3.c                        \
                                plat/xilinx/versal/aarch64/versal_helpers.S     \
                                plat/xilinx/versal/aarch64/versal_common.c
@@ -64,6 +65,7 @@ BL31_SOURCES          +=      drivers/arm/cci/cci.c                           \
                                lib/cpus/aarch64/cortex_a72.S                   \
                                plat/common/plat_psci_common.c                  \
                                plat/xilinx/common/ipi.c                        \
+                               plat/xilinx/common/plat_startup.c               \
                                plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \
                                plat/xilinx/common/pm_service/pm_ipi.c          \
                                plat/xilinx/versal/bl31_versal_setup.c          \