drm/amd/display: Add FAMS validation before trying to use it

[ Upstream commit e3416e872f84086667df21daf166506fab97358d ]

To ensure that FAMS can be used, DC must check if there is VRR support.
This commit adds the required configuration to ensure FAMS can be executed in the target system.

Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Stable-dep-of: 2a9482e55968 ("drm/amd/display: Prevent vtotal from being set to 0")
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 6e2220e2e5ba32cd4b0edd3abe48c34ed8ef15b3..27cec123cb06f9b247b1801f2a01d06a31738f7a 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -2588,6 +2588,12 @@ static enum surface_update_type check_update_surfaces_for_stream(
 
                if (stream_update->mst_bw_update)
                        su_flags->bits.mst_bw = 1;
+
+               if (stream_update->stream && stream_update->stream->freesync_on_desktop &&
+                       (stream_update->vrr_infopacket || stream_update->allow_freesync ||
+                               stream_update->vrr_active_variable))
+                       su_flags->bits.fams_changed = 1;
+
                if (stream_update->crtc_timing_adjust && dc_extended_blank_supported(dc))
                        su_flags->bits.crtc_timing_adjust = 1;
 

diff --git a/drivers/gpu/drm/amd/display/dc/dc_stream.h b/drivers/gpu/drm/amd/display/dc/dc_stream.h
index 73dccd485895d6caec808f58e1fb7311d21572e1..364ff913527d8652766484e3b16609d228a903c2 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_stream.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_stream.h
@@ -131,6 +131,7 @@ union stream_update_flags {
                uint32_t dsc_changed : 1;
                uint32_t mst_bw : 1;
                uint32_t crtc_timing_adjust : 1;
+               uint32_t fams_changed : 1;
        } bits;
 
        uint32_t raw;

diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
index 25749f7d88366215e12346edc08a589900e2cd85..94894fd6c90623e916ca8861083aadabf010d28e 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
@@ -292,7 +292,12 @@ void optc3_wait_drr_doublebuffer_pending_clear(struct timing_generator *optc)
 
 void optc3_set_vtotal_min_max(struct timing_generator *optc, int vtotal_min, int vtotal_max)
 {
-       optc1_set_vtotal_min_max(optc, vtotal_min, vtotal_max);
+       struct dc *dc = optc->ctx->dc;
+
+       if (dc->caps.dmub_caps.mclk_sw && !dc->debug.disable_fams)
+               dc_dmub_srv_drr_update_cmd(dc, optc->inst, vtotal_min, vtotal_max);
+       else
+               optc1_set_vtotal_min_max(optc, vtotal_min, vtotal_max);
 }
 
 void optc3_tg_init(struct timing_generator *optc)

diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
index 27a4ea7dc74ec38ca8e977eb47dd625864bb094b..d8c05bc45957b7827e14b8ada511905d1ca1d302 100644 (file)
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
@@ -345,7 +345,7 @@ union dmub_fw_boot_status {
                uint32_t optimized_init_done : 1; /**< 1 if optimized init done */
                uint32_t restore_required : 1; /**< 1 if driver should call restore */
                uint32_t defer_load : 1; /**< 1 if VBIOS data is deferred programmed */
-               uint32_t reserved : 1;
+               uint32_t fams_enabled : 1; /**< 1 if VBIOS data is deferred programmed */
                uint32_t detection_required: 1; /**<  if detection need to be triggered by driver */
 
        } bits; /**< status bits */