U-Boot is loaded at the beginning of the DDR:
STM32MP_DDR_BASE = 0xC0000000.
This patch remove the need to use the 0x100000 offset, reserved
on STM32MP15 for flashlayout.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I8d0a93f4db411cf59838e635a315c729cccee269
#endif
#endif
+#if STM32MP13
+#define STM32MP_BL33_BASE STM32MP_DDR_BASE
+#endif
+#if STM32MP15
#define STM32MP_BL33_BASE (STM32MP_DDR_BASE + U(0x100000))
+#endif
#define STM32MP_BL33_MAX_SIZE U(0x400000)
/* Define maximum page size for NAND devices */