]> git.baikalelectronics.ru Git - arm-tf.git/commitdiff
Tegra: retrieve BL32's bootargs from bl32_ep_info
authorVarun Wadekar <vwadekar@nvidia.com>
Fri, 31 Jul 2015 04:33:01 +0000 (10:03 +0530)
committerVarun Wadekar <vwadekar@nvidia.com>
Fri, 31 Jul 2015 04:56:22 +0000 (10:26 +0530)
This patch removes the bootargs pointer from the platform params
structure. Instead the bootargs are passed by the BL2 in the
bl32_ep_info struct which is a part of the EL3 params struct.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
docs/spd/tlk-dispatcher.md
plat/nvidia/tegra/common/tegra_bl31_setup.c
plat/nvidia/tegra/include/tegra_private.h

index 890b35e7b4e33592fda842bc7580af8763560fb2..40c83444c620a5d76be8b41bf49b71075de1e454 100644 (file)
@@ -10,12 +10,9 @@ In order to compile TLK-D, we need a BL32 image to be present. Since, TLKD
 just needs to compile, any BL32 image would do. To use TLK as the BL32, please
 refer to the "Build TLK" section.
 
-Once a BL32 is ready, TLKD can be included in the image using the following
-command:
+Once a BL32 is ready, TLKD can be included in the image by adding "SPD=tlkd"
+to the build command.
 
-CROSS_COMPILE=<path_to_linaro_chain>/bin/aarch64-none-elf- make NEED_BL1=0
-NEED_BL2=0 BL32=<path_to_BL32_image> PLAT=<platform> SPD=tlkd all
-_
 Trusted Little Kernel (TLK)
 ===========================
 TLK is a Trusted OS running as Secure EL1. It is a Free Open Source Software
@@ -58,3 +55,16 @@ Build TLK
 =========
 To build and execute TLK, follow the instructions from "Building a TLK Device"
 section from Tegra_BSP_for_Android_TLK_FOSS_Reference.pdf manual.
+
+Input parameters to TLK
+=======================
+TLK expects the TZDRAM size and a structure containing the boot arguments. BL2
+passes this information to the EL3 software as members of the bl32_ep_info
+struct, where bl32_ep_info is part of bl31_params_t (passed by BL2 in X0)
+
+Example:
+--------
+    bl32_ep_info->args.arg0 = TZDRAM size available for BL32
+    bl32_ep_info->args.arg1 = unused (used only on ARMv7)
+    bl32_ep_info->args.arg2 = pointer to boot args
+
index ce7f31757dbe10792d5d9cfab928ac66ef3203b5..d6ea664466a03be5c6273ed26e7c2b04333626ad 100644 (file)
@@ -85,7 +85,7 @@ extern uint64_t tegra_bl31_phys_base;
 
 static entry_point_info_t bl33_image_ep_info, bl32_image_ep_info;
 static plat_params_from_bl2_t plat_bl31_params_from_bl2 = {
-       (uint64_t)TZDRAM_SIZE, (uintptr_t)NULL
+       .tzdram_size = (uint64_t)TZDRAM_SIZE
 };
 
 /*******************************************************************************
@@ -145,13 +145,10 @@ void bl31_early_platform_setup(bl31_params_t *from_bl2,
        bl32_image_ep_info = *from_bl2->bl32_ep_info;
 
        /*
-        * Parse platform specific parameters - TZDRAM aperture size and
-        * pointer to BL32 params.
+        * Parse platform specific parameters - TZDRAM aperture size
         */
-       if (plat_params) {
+       if (plat_params)
                plat_bl31_params_from_bl2.tzdram_size = plat_params->tzdram_size;
-               plat_bl31_params_from_bl2.bl32_params = plat_params->bl32_params;
-       }
 }
 
 /*******************************************************************************
index dbd66893816211d69667e4dbfc0c34c50152476c..952e2d8b373c656a4a9416d926bdb7684674777e 100644 (file)
@@ -42,7 +42,6 @@
 
 typedef struct plat_params_from_bl2 {
        uint64_t tzdram_size;
-       uintptr_t bl32_params;
 } plat_params_from_bl2_t;
 
 /* Declarations for plat_psci_handlers.c */