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iio: adc: hi8435: Fix alignment for DMA safety
authorJonathan Cameron <Jonathan.Cameron@huawei.com>
Sun, 8 May 2022 17:56:00 +0000 (18:56 +0100)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Tue, 14 Jun 2022 10:53:13 +0000 (11:53 +0100)
commitfe7bb5df3ae60844cc816d49654d176cfb67873b
treea1ceaa1a45bce2576a214e2a027eedeb1eb5c75ftree | snapshot
parent0a61dcdff09428b7f8b4bf5cbe0737b78f20d4bfcommit | diff
iio: adc: hi8435: Fix alignment for DMA safety

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 90f4046a4880 ("iio: adc: hi8435: Holt HI-8435 threshold detector")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-21-jic23@kernel.org
drivers/iio/adc/hi8435.c diff | blob | history
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