git.baikalelectronics.ru Git - kernel.git/commit

author	Matt Roper <matthew.d.roper@intel.com>
	Thu, 5 Sep 2019 18:13:37 +0000 (11:13 -0700)
committer	Matt Roper <matthew.d.roper@intel.com>
	Fri, 6 Sep 2019 15:42:13 +0000 (08:42 -0700)
commit	fc477e8891437b323ad04dacecef0a14c760f826
tree	2ab0eb651f8fca118e2b1016c42e4f114456a4c3	tree \| snapshot
parent	98548cc12cc6cd6edfab2f45d999af4116bba7dd	commit \| diff

drm/i915/tgl: Use refclk/2 as bypass frequency

Unlike gen11, which always ran at 50MHz when the cdclk PLL was disabled,
TGL runs at refclk/2. The 50MHz croclk/2 is only used by hardware
during some power state transitions.

Bspec: 49201
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190905181337.23727-1-matthew.d.roper@intel.com
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>