]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915/gvt: Fix kernel oops for 3-level ppgtt guest
authorZhenyu Wang <zhenyuw@linux.intel.com>
Wed, 6 May 2020 09:59:18 +0000 (17:59 +0800)
committerZhenyu Wang <zhenyuw@linux.intel.com>
Mon, 11 May 2020 09:07:25 +0000 (17:07 +0800)
commitfb8bf0a8513e09b22054e8d9020b9a79a2fce1fc
tree8aeb137b018cbb7efa22c0e2c8760576b8eaffcd
parentc531f8eccd010e8004c6f9b6daaff19767bef72a
drm/i915/gvt: Fix kernel oops for 3-level ppgtt guest

As i915 won't allocate extra PDP for current default PML4 table,
so for 3-level ppgtt guest, we would hit kernel pointer access
failure on extra PDP pointers. So this trys to bypass that now.
It won't impact real shadow PPGTT setup, so guest context still
works.

This is verified on 4.15 guest kernel with i915.enable_ppgtt=1
to force on old aliasing ppgtt behavior.

Fixes: a161183cd554 ("drm/i915: Add ppgtt to GVT GEM context")
Reviewed-by: Xiong Zhang <xiong.y.zhang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20200506095918.124913-1-zhenyuw@linux.intel.com
drivers/gpu/drm/i915/gvt/scheduler.c