]> git.baikalelectronics.ru Git - uboot.git/commit
rockchip: clk: Add rk3328 SARADC clock support
authorDavid Wu <david.wu@rock-chips.com>
Wed, 20 Sep 2017 06:35:44 +0000 (14:35 +0800)
committerPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Sat, 30 Sep 2017 22:33:30 +0000 (00:33 +0200)
commitfb55ea798142566e834d03755edb56d3541a122a
treedb6f8ccbfbd9a202615b86275432e782d3e16fb1
parent67bd451f9a7d80a70e4baf1da0ab4dfb02360266
rockchip: clk: Add rk3328 SARADC clock support

The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
SARADC integer divider control register is 10-bits width.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
drivers/clk/rockchip/clk_rk3328.c