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(parent: cd92178) | patch
clk: sunxi-ng: a33: gate then ungate PLL CPU clk after rate change
authorChen-Yu Tsai <wens@csie.org>
Thu, 13 Apr 2017 02:13:53 +0000 (10:13 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Thu, 13 Apr 2017 09:22:04 +0000 (11:22 +0200)
commitfa7f0972129a1eec9b9372b6af0f527465f9a0c1
tree337f7c7f00c68c84d696ca00c3d61dde4ab6f8aetree | snapshot
parentcd921787d1b226033bcc8bb5c59562fb98e77330commit | diff
clk: sunxi-ng: a33: gate then ungate PLL CPU clk after rate change

This patch utilizes the new PLL clk notifier to gate then ungate the
PLL CPU clock after rate changes. This should mitigate the system
hangs observed after the introduction of cpufreq for the A33.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
drivers/clk/sunxi-ng/ccu-sun8i-a33.c diff | blob | history
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