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(parent: 4527c51) | patch
media: platform: stm32: wait end of transmission
authorYannick Fertre <yannick.fertre@st.com>
Fri, 29 Mar 2019 12:39:42 +0000 (08:39 -0400)
committerMauro Carvalho Chehab <mchehab+samsung@kernel.org>
Mon, 22 Apr 2019 14:29:31 +0000 (10:29 -0400)
commitfa52dca5573095abf8c5604c31f2afb4fe26a817
tree196fcd2e330e359d598aaa2e8df51aeac394a722tree | snapshot
parent4527c513bd98c2d99c514ca65f7abe717b2e4486commit | diff
media: platform: stm32: wait end of transmission

It is mandatory to write CEC_CFGR only when CECEN=0. To protect
transmission, a check have been added to delayed logical address
modification. This patch is necessary tp pass all tests of compliance.

Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
Reviewed-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
drivers/media/platform/stm32/stm32-cec.c diff | blob | history
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