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ASoC: correct s6000 I2S clock polarity
authorDaniel Glöckner <dg@emlix.com>
Mon, 6 Apr 2009 09:50:22 +0000 (11:50 +0200)
committerMark Brown <broonie@opensource.wolfsonmicro.com>
Mon, 6 Apr 2009 10:18:39 +0000 (11:18 +0100)
commitf812a8960e36732055fd87f99ec3c4f8b9d1c497
tree1ad5a6dfdf219fd8e8ce3e0a0ec0be26b11d96a7tree | snapshot
parent12683c9451b2c3df1db6ee09227f95591b33c5eacommit | diff
ASoC: correct s6000 I2S clock polarity

According to the data sheet data is clocked out on the falling edge
and latched on the rising edge of the bit clock. While the left sample
is transmitted the word clock line is low.

Signed-off-by: Daniel Glöckner <dg@emlix.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
sound/soc/s6000/s6000-i2s.c diff | blob | history
sound/soc/s6000/s6105-ipcam.c diff | blob | history
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