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phy: cadence: Sierra: Configure both lane cdb and common cdb registers for external SSC
authorAnil Varughese <aniljoy@cadence.com>
Mon, 16 Dec 2019 09:57:05 +0000 (15:27 +0530)
committerKishon Vijay Abraham I <kishon@ti.com>
Wed, 8 Jan 2020 07:28:06 +0000 (12:58 +0530)
commitf6a4f9a84176545b11f395dbaabad6b0ddaaac6e
treef9d44f5def70b97d46108ebbdbcf690213bedd5atree | snapshot
parent61d134355662ef35ba99e6855f284d5a520801c8commit | diff
phy: cadence: Sierra: Configure both lane cdb and common cdb registers for external SSC

The existing configuration done in Cadence Sierra driver is only for
reference and is not used in any platforms. Remove them and configure
both lane cdb and common cdb registers to be used with external
SSC configuration. This is validated in TI J721E platform.

Signed-off-by: Anil Varughese <aniljoy@cadence.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
drivers/phy/cadence/phy-cadence-sierra.c diff | blob | history
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