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(parent: 543f218) | patch
drm/mgag200: Compute PLL values during atomic check
authorThomas Zimmermann <tzimmermann@suse.de>
Wed, 14 Jul 2021 14:22:40 +0000 (16:22 +0200)
committerThomas Zimmermann <tzimmermann@suse.de>
Sun, 8 Aug 2021 18:14:14 +0000 (20:14 +0200)
commitf011c3e142cd6f9dd7f1edb92fbecb3113eeb706
tree15f0ee11bf16ce42d1d221b21ee5c4dac3b2becbtree | snapshot
parent543f218026aff0433654b7a1210876af49b74d40commit | diff
drm/mgag200: Compute PLL values during atomic check

PLL setup can fail if the display mode's clock is not supported by
any PLL configuration. Compute the PLL values during atomic check, so
that atomic commits can fail at the appropriate time. If successful,
use the values in the atomic-update phase.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210714142240.21979-14-tzimmermann@suse.de
drivers/gpu/drm/mgag200/mgag200_drv.h diff | blob | history
drivers/gpu/drm/mgag200/mgag200_mode.c diff | blob | history
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