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ASoC: Intel: avs: General code loading flow
authorCezary Rojewski <cezary.rojewski@intel.com>
Fri, 11 Mar 2022 15:35:41 +0000 (16:35 +0100)
committerMark Brown <broonie@kernel.org>
Fri, 11 Mar 2022 16:24:07 +0000 (16:24 +0000)
commitee1ecb5f878b217d80c22f81853fd4679cd80ea2
treee67ea17c5e924c67119ee219d1334db2690a1929tree | snapshot
parent1ba72d1d7674c9952ec817f01d8a31bc42fab28ecommit | diff
ASoC: Intel: avs: General code loading flow

Code loading is a complex procedure and requires combined effort of DMA
and IPCs. With IPCs already in place, lay out ground for specific DMA
transfer operations.

Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20220311153544.136854-15-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/intel/avs/Makefile diff | blob | history
sound/soc/intel/avs/avs.h diff | blob | history
sound/soc/intel/avs/core.c [new file with mode: 0644] blob
sound/soc/intel/avs/dsp.c diff | blob | history
sound/soc/intel/avs/loader.c [new file with mode: 0644] blob
sound/soc/intel/avs/registers.h diff | blob | history
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