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(parent: dbdba5e) | patch
ram: k3-ddrss: Fix register name and explain its usage
authorDominic Rath <rath@ibv-augsburg.net>
Wed, 6 Apr 2022 09:56:47 +0000 (11:56 +0200)
committerTom Rini <trini@konsulko.com>
Wed, 20 Apr 2022 15:14:39 +0000 (11:14 -0400)
commiteda06b529b0cfd79f75fd31f2a7ae4c22d90b5dc
tree83f28046388ea77698cfe938fd8d4bb234facbf4tree | snapshot
parentdbdba5e54ce16b32409ccf2ad9973a2ef3a37ac5commit | diff
ram: k3-ddrss: Fix register name and explain its usage

The k3-ddrss driver wants to configure the DDRSS_V2A_CTL_REG to reflect
the maximum possible SDRAM of 2 GB for AM64x (instead of the register's
default that says 8 GB, which the AM64x DDR controller wouldn't support).

The offset 0x20 was correct, but the register name DDRSS_V2A_R1_MAT_REG
was that of the next register at offset 0x24.

Signed-off-by: Dominic Rath <rath@ibv-augsburg.net>
drivers/ram/k3-ddrss/k3-ddrss.c diff | blob | history
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