]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915: Use fixed offset for PTEs location
authorMichal Wajdeczko <michal.wajdeczko@intel.com>
Sun, 26 Sep 2021 20:10:05 +0000 (22:10 +0200)
committerMatt Roper <matthew.d.roper@intel.com>
Fri, 1 Oct 2021 18:28:19 +0000 (11:28 -0700)
commitecd24514ea6a823aa1c2812d9bbc7354016781f1
tree4e054493eb4ddcdcc926d0ac51ebecff1aa701cb
parentbfe9f6dc44acd99f5494a16bb3addb882ac48811
drm/i915: Use fixed offset for PTEs location

We assumed that for all modern GENs the PTEs and register space are
split in the GTTMMADR BAR, but while it is true, we should rather use
fixed offset as it is defined in the specification.

Bspec: 4409, 4457, 4604, 11181, 9027, 13246, 13321, 44980

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: CQ Tang <cq.tang@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210926201005.1450-1-michal.wajdeczko@intel.com
drivers/gpu/drm/i915/gt/intel_ggtt.c