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(parent: 7ef501f) | patch
armv8/fsl-lsch2: correct the config description of DSPI clock divider
authorHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Mon, 3 Jul 2017 10:37:11 +0000 (18:37 +0800)
committerYork Sun <york.sun@nxp.com>
Wed, 9 Aug 2017 16:57:32 +0000 (09:57 -0700)
commitec69f7733f33b8afe75e11237110d0ca4812a9c2
treea695a2c27318a57c342f3683b92e4fbdf01854dbtree | snapshot
parent7ef501f3f986c422ecf9ad1d3c7304045e8215a1commit | diff
armv8/fsl-lsch2: correct the config description of DSPI clock divider

It is derived from Platform clock instead of Platform PLL frequency.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
arch/arm/cpu/armv8/fsl-layerscape/Kconfig diff | blob | history
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