]> git.baikalelectronics.ru Git - arm-tf.git/commit
Tegra194: memctrl: program MC_TXN_OVERRIDE reg for PTCR, MPCORE and MIU
authorPritesh Raithatha <praithatha@nvidia.com>
Thu, 1 Mar 2018 12:11:36 +0000 (17:41 +0530)
committerVarun Wadekar <vwadekar@nvidia.com>
Thu, 23 Jan 2020 17:01:10 +0000 (09:01 -0800)
commiteb41fee452a8e6286a7a3369ee0b2f552d44aa2c
tree22657f72435cae2b45e8e3f297c9555b7871c8d4
parent90dce0f9c0a70732a9c25c14ab31d171494fef87
Tegra194: memctrl: program MC_TXN_OVERRIDE reg for PTCR, MPCORE and MIU

-PTCR is ISO client so setting it to FORCE_NON_COHERENT.
-MPCORER, MPCOREW and MIU0R/W to MIU7R/W clients itself will provide
ordering so no need to override from mc.
-MIU0R/W to MIU7R/W clients registers are not implemented in tegrasim
so skipping it for simulation.
-All the clients need to set CGID_TAG_ADR to maintain request ordering
within a 4K boundary.

Change-Id: Iaa3189a1f3e40fb4cef28be36bc4baeb5ac8f9ca
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
plat/nvidia/tegra/soc/t194/plat_memctrl.c