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(parent: 8a45ef9) | patch
clk: tegra: introduce TEGRA_PLL_HAS_LOCK_ENABLE
authorPeter De Schrijver <pdeschrijver@nvidia.com>
Wed, 3 Apr 2013 14:40:38 +0000 (17:40 +0300)
committerStephen Warren <swarren@nvidia.com>
Thu, 4 Apr 2013 22:10:42 +0000 (16:10 -0600)
commiteb36960fab10da3a8ec64ef3cd70ddaea7733cf6
tree6ac134721cc41bbedb8679536b8020b68ebc61b8tree | snapshot
parent8a45ef981f160c13b248ba5e2c4c60aa565eca9ccommit | diff
clk: tegra: introduce TEGRA_PLL_HAS_LOCK_ENABLE

Tegra114 PLLC2 and PLLC3 don't have a lock enable bit. The lock bits are
always functional.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
drivers/clk/tegra/clk-pll.c diff | blob | history
drivers/clk/tegra/clk.h diff | blob | history
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