riscv: Add SPL_ZERO_MEM_BEFORE_USE implementation

riscv: Add SPL_ZERO_MEM_BEFORE_USE implementation

Add the actual support code for SPL_ZERO_MEM_BEFORE_USE and remove
existing Starfive JH7110's L2 LIM clean code, since existing code has
following issues:
 1. Each hart (in the middle of a function call) overwriting its own
    stack and other harts' stacks.
    (data-race and data-corruption)
 2. Lottery winner hart can be doing "board_init_f_init_reserve",
    while other harts are in the middle of zeroing L2 LIM.
    (data-race)

Signed-off-by: Bo Gan <ganboing@gmail.com>
Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>