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(parent: 7ac7f86) | patch
drm/amd/display: fix code to control 48mhz refclk
authorEric Yang <Eric.Yang2@amd.com>
Thu, 18 Jul 2019 17:56:59 +0000 (13:56 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 11 Oct 2019 00:33:15 +0000 (19:33 -0500)
commite9efc6e770cc9f955b47040f8bd7ea0d05476b2c
tree16c7a436002b1a0074abb358e84b34dc775af264tree | snapshot
parent7ac7f863d96f3dc279cf0e9b9ccf51b2bc4a6aaacommit | diff
drm/amd/display: fix code to control 48mhz refclk

[Why]
The SMU message to enable this feature looks at argument. Previous code
didn't send right argument. This change will allow the feature to be
be enabled.

[How]
Fixed one issue where SMU message to enable the feature was sent without
setting the parameter.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c diff | blob | history
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c diff | blob | history
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h diff | blob | history
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c diff | blob | history
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