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(parent: 17b7434) | patch
armv7: ls102xa: Add workaround for DDR erratum A-008850
authorAlison Wang <alison.wang@nxp.com>
Wed, 6 Mar 2019 06:49:14 +0000 (14:49 +0800)
committerPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Fri, 15 Mar 2019 06:22:01 +0000 (11:52 +0530)
commite65aa66650d63abd1388ff75d2ab99d5a87d881b
tree78453d3d716aef5368b91a620203c0487fe6f378tree | snapshot
parent17b7434b84df586b02ba14f4c1a1bcb96b5714d2commit | diff
armv7: ls102xa: Add workaround for DDR erratum A-008850

Barrier transactions from CCI400 need to be disabled till
the DDR is configured, otherwise it may lead to system hang.
The patch adds workaround to fix the erratum.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
arch/arm/cpu/armv7/ls102xa/Kconfig diff | blob | history
arch/arm/cpu/armv7/ls102xa/soc.c diff | blob | history
arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h diff | blob | history
board/freescale/ls1021aiot/ls1021aiot.c diff | blob | history
board/freescale/ls1021aqds/ddr.c diff | blob | history
board/freescale/ls1021aqds/ddr.h diff | blob | history
board/freescale/ls1021aqds/ls1021aqds.c diff | blob | history
board/freescale/ls1021atwr/ls1021atwr.c diff | blob | history
include/configs/ls1021aiot.h diff | blob | history
include/configs/ls1021atwr.h diff | blob | history
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