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(parent: 687bff8) | patch
clk: renesas: r9a07g044: Add GPIO clock and reset entries
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Mon, 12 Jul 2021 19:44:20 +0000 (20:44 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 19 Jul 2021 09:22:10 +0000 (11:22 +0200)
commite5d78f4c44d6debc8aa43c93dfcd69342cb57eca
tree4ddd884442b1168e5abb05ebc60a4cc4db6d6021tree | snapshot
parent687bff8bde035be6da8036d230b3186382f25021commit | diff
clk: renesas: r9a07g044: Add GPIO clock and reset entries

Add GPIO clock and reset entries in CPG driver.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20210712194422.12405-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r9a07g044-cpg.c diff | blob | history
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