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(parent: f630c74) | patch
ARM: debug: enable UART1 for socfpga Cyclone5
authorClément Péron <peron.clem@gmail.com>
Tue, 9 Oct 2018 11:28:37 +0000 (13:28 +0200)
committerDinh Nguyen <dinguyen@kernel.org>
Wed, 28 Nov 2018 15:18:36 +0000 (09:18 -0600)
commite435532275f2e834acd7f64be804fa06e40660f1
tree52a0e74f47f2c8072ba9b01c8994122cddb34447tree | snapshot
parentf630c74755763954e46ada22cb887770a3c4fdd4commit | diff
ARM: debug: enable UART1 for socfpga Cyclone5

Cyclone5 and Arria10 doesn't have the same memory map for UART1.

Split the SOCFPGA_UART1 into 2 options to allow debugging on UART1 for Cyclone5.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
arch/arm/Kconfig.debug diff | blob | history
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