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(parent: c9d45b6) | patch
drm/radeon: fix surface setup on r1xx
authorAlex Deucher <alexander.deucher@amd.com>
Fri, 5 Jul 2013 14:05:49 +0000 (10:05 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 5 Jul 2013 22:09:11 +0000 (18:09 -0400)
commite3496fa6578f5ab1eaaf8f18d69afdde477943fd
tree99f8b0b84ca5f72e334437eb97422015f4d1ab74tree | snapshot
parentc9d45b6d72c12da76264bccac49c26d44cbd1027commit | diff
drm/radeon: fix surface setup on r1xx

r1xx asics have a slightly different surface register
setup compared to newer asics.  There is no specific
enable bit for macro tiling, rather, to disable macro
tiling, you need to set the surface pitch to 0.

With this fixed, the special rn50 handling can go.

Noticed-by: Mark Kettenis <mark.kettenis@xs4all.nl>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/r100.c diff | blob | history
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