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riscv: Align on L1_CACHE_BYTES when STRICT_KERNEL_RWX
authorSebastien Van Cauwenberghe <svancau@gmail.com>
Fri, 29 Jan 2021 19:00:37 +0000 (11:00 -0800)
committerPalmer Dabbelt <palmerdabbelt@google.com>
Wed, 3 Feb 2021 02:36:29 +0000 (18:36 -0800)
commite30d22b5596a962cecc048ef2ef398ffffee190a
tree9b8847093fab20cf2b6acd6635c521d23e0f8793tree | snapshot
parent6cb95539efcfc264db692f41410dee5a453d8aa7commit | diff
riscv: Align on L1_CACHE_BYTES when STRICT_KERNEL_RWX

Allows the sections to be aligned on smaller boundaries and
therefore results in a smaller kernel image size.

Signed-off-by: Sebastien Van Cauwenberghe <svancau@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
arch/riscv/include/asm/set_memory.h diff | blob | history
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