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(parent: 6c1c410) | patch
arm: lpc32xx: Fix timer initialization
authorGregory CLEMENT <gregory.clement@bootlin.com>
Wed, 17 Apr 2019 09:48:45 +0000 (11:48 +0200)
committerTom Rini <trini@konsulko.com>
Fri, 26 Apr 2019 22:58:20 +0000 (18:58 -0400)
commitdf9080606ce4bb4f2dc422e0775b2895350cb9e2
tree7bfd0091dd052b06901febe04368f32399f0516ctree | snapshot
parent6c1c41042bdf2bed00bab5f095f3f64cb206a422commit | diff
arm: lpc32xx: Fix timer initialization

The match controller register is not cleared during
initialization. However, some bits of this register may reset the TC if
tnMRx match it.

As we can't make any assumption about how U-Boot is launched by the first
stage bootloader (such as S1L) clearing this register ensure that the
timers work as expected.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
arch/arm/cpu/arm926ejs/lpc32xx/timer.c diff | blob | history
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