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RISC-V: Improve SBI definitions
authorAtish Patra <atishp@rivosinc.com>
Mon, 11 Jul 2022 17:46:32 +0000 (10:46 -0700)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 11 Aug 2022 21:58:32 +0000 (14:58 -0700)
commitde6cbcb6ce287d286f874e5a06b057595467601d
tree7035ce64825677dca65702461c5974caef0735c7tree | snapshot
parentb82288f32c431c9f45ef8b5a82e8a23b2b4097f3commit | diff
RISC-V: Improve SBI definitions

Fixed few typos and bit fields not aligned with the spec. Define other
related macros that will be useful in the future.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20220711174632.4186047-6-atishp@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/sbi.h diff | blob | history
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