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(parent: 4b20357) | patch
arm: socfpga: vining: Fix UDC controller phandle in DT
authorMarek Vasut <marex@denx.de>
Tue, 14 Sep 2021 03:25:34 +0000 (05:25 +0200)
committerRamon Fried <rfried.dev@gmail.com>
Tue, 28 Sep 2021 15:50:55 +0000 (18:50 +0300)
commitddf39094e94bbb0b725d8b743406730f97948147
tree36aa2cae5404af8b67157eb8309635dcf67b93bftree | snapshot
parent4b203575e7c937983f8318c413b072c2fc158a65commit | diff
arm: socfpga: vining: Fix UDC controller phandle in DT

The USB peripheral controller is the DWC2 controller 1, not 0.
Update the phandle to fix UDC support on this board.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi diff | blob | history
"Das U-Boot" Source Tree.