]> git.baikalelectronics.ru Git - arm-tf.git/commit
Workaround for Cortex A76 erratum 1800710
authorjohpow01 <john.powell@arm.com>
Tue, 2 Jun 2020 20:02:28 +0000 (15:02 -0500)
committerjohpow01 <john.powell@arm.com>
Mon, 22 Jun 2020 22:47:54 +0000 (17:47 -0500)
commitdcbfbcb5de2c0110cf397dae62a4f6cf7ad2a6a2
tree4b835f66789ef4c441e8853b27af29f5b46b9961
parentd7b08e69044611c13f2691011a0dc02383106474
Workaround for Cortex A76 erratum 1800710

Cortex A76 erratum 1800710 is a Cat B erratum, present in older
revisions of the Cortex A76 processor core.  The workaround is to
set a bit in the ECTLR_EL1 system register, which disables allocation
of splintered pages in the L2 TLB.

This errata is explained in this SDEN:
https://static.docs.arm.com/sden885749/g/Arm_Cortex_A76_MP052_Software_Developer_Errata_Notice_v20.pdf

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Ifc34f2e9e053dcee6a108cfb7df7ff7f497c9493
docs/design/cpu-specific-build-macros.rst
include/lib/cpus/aarch64/cortex_a76.h
lib/cpus/aarch64/cortex_a76.S
lib/cpus/cpu-ops.mk