]> git.baikalelectronics.ru Git - kernel.git/commit
powerpc/mm/slice: Allow up to 64 low slices
authorChristophe Leroy <christophe.leroy@c-s.fr>
Thu, 22 Feb 2018 14:27:28 +0000 (15:27 +0100)
committerMichael Ellerman <mpe@ellerman.id.au>
Mon, 5 Mar 2018 22:21:23 +0000 (09:21 +1100)
commitdbea1026c7fcf9c352ed65585ebd104ce53c58d1
tree7f06b7bf75af5c3649a3c4f28144e4a50b3da72e
parentd28b2e4ba0f9302e5f6b87c5cb5a1952c0fdaeaa
powerpc/mm/slice: Allow up to 64 low slices

While the implementation of the "slices" address space allows
a significant amount of high slices, it limits the number of
low slices to 16 due to the use of a single u64 low_slices_psize
element in struct mm_context_t

On the 8xx, the minimum slice size is the size of the area
covered by a single PMD entry, ie 4M in 4K pages mode and 64M in
16K pages mode. This means we could have at least 64 slices.

In order to override this limitation, this patch switches the
handling of low_slices_psize to char array as done already for
high_slices_psize.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/include/asm/book3s/64/mmu.h
arch/powerpc/include/asm/mmu-8xx.h
arch/powerpc/include/asm/paca.h
arch/powerpc/kernel/paca.c
arch/powerpc/mm/hash_utils_64.c
arch/powerpc/mm/slb_low.S
arch/powerpc/mm/slice.c