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(parent: f6c0685) | patch
mlxsw: reg: Add QoS Priority to DSCP Mapping Register
authorPetr Machata <petrm@mellanox.com>
Fri, 27 Jul 2018 12:27:00 +0000 (15:27 +0300)
committerDavid S. Miller <davem@davemloft.net>
Fri, 27 Jul 2018 20:17:50 +0000 (13:17 -0700)
commitd9ee9371c83732a5d4ab0a685c58d026446e9804
tree0d1415c1b87f41224412d50f7bf196dca36790detree | snapshot
parentf6c06855887f1fd862c301d3778679f0f0eeb08ecommit | diff
mlxsw: reg: Add QoS Priority to DSCP Mapping Register

This register controls mapping from Priority to DSCP for purposes of
rewrite. Note that rewrite happens as the packet is transmitted provided
that the DSCP rewrite bit is enabled for the packet.

Signed-off-by: Petr Machata <petrm@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mellanox/mlxsw/reg.h diff | blob | history
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