]> git.baikalelectronics.ru Git - kernel.git/commit
arm64: mm: Fix TLBI vs ASID rollover
authorWill Deacon <will@kernel.org>
Fri, 6 Aug 2021 11:31:04 +0000 (12:31 +0100)
committerCatalin Marinas <catalin.marinas@arm.com>
Fri, 6 Aug 2021 12:52:03 +0000 (13:52 +0100)
commitd89d0345554db3beb96a3f10a97776a9ce6b9916
treeff4dcc17684744bb95c253fb15f20d9b7c44e2b0
parentd21b702ffda65aa3bc90347c96bb94d92af85ff1
arm64: mm: Fix TLBI vs ASID rollover

When switching to an 'mm_struct' for the first time following an ASID
rollover, a new ASID may be allocated and assigned to 'mm->context.id'.
This reassignment can happen concurrently with other operations on the
mm, such as unmapping pages and subsequently issuing TLB invalidation.

Consequently, we need to ensure that (a) accesses to 'mm->context.id'
are atomic and (b) all page-table updates made prior to a TLBI using the
old ASID are guaranteed to be visible to CPUs running with the new ASID.

This was found by inspection after reviewing the VMID changes from
Shameer but it looks like a real (yet hard to hit) bug.

Cc: <stable@vger.kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Jade Alglave <jade.alglave@arm.com>
Cc: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Signed-off-by: Will Deacon <will@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20210806113109.2475-2-will@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arch/arm64/include/asm/mmu.h
arch/arm64/include/asm/tlbflush.h