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(parent: 54c0477) | patch
drm/i915/cnl: Configure EU slice power gating.
authorRodrigo Vivi <rodrigo.vivi@intel.com>
Tue, 6 Jun 2017 20:30:36 +0000 (13:30 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Wed, 7 Jun 2017 14:29:42 +0000 (07:29 -0700)
commitd69629e58842f5e6c6c5908a1b4ab5a8369b9ffd
tree70d9798a216ad46a2a8f6d8673bce402c8ddfdd2tree | snapshot
parent54c047721b50d607d72b992a9a49f84a8ede7683commit | diff
drm/i915/cnl: Configure EU slice power gating.

Cannonlake also supports slice power gating on devices with more
than one slice as SKL. Let's assume that this is the same for SKL+
and exclude BXT only.

v2: Also remove KBL.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1496781040-20888-7-git-send-email-rodrigo.vivi@intel.com
drivers/gpu/drm/i915/intel_device_info.c diff | blob | history
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