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(parent: 3d1d979) | patch
OMAP3: PM: Fix for MPU power domain MEM BANK position
authorThara Gopinath <thara@ti.com>
Tue, 8 Dec 2009 23:33:15 +0000 (16:33 -0700)
committerpaul <paul@twilight.(none)>
Sat, 12 Dec 2009 00:00:42 +0000 (17:00 -0700)
commitd666043ba5f544a83403e54aca2deb347cebe656
tree1d7d15664c0ae3a71be7949e9c52ca2f79a73811tree | snapshot
parent3d1d9793e694e68e1b16324fc624c5ad724cf1f5commit | diff
OMAP3: PM: Fix for MPU power domain MEM BANK position

MPU power domain bank 0 bits are displayed in position of bank 1
in PWRSTS and PREPWRSTS registers. So read them from correct
position

Signed-off-by: Thara Gopinath <thara@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
arch/arm/mach-omap2/powerdomain.c diff | blob | history
arch/arm/mach-omap2/powerdomains34xx.h diff | blob | history
arch/arm/plat-omap/include/plat/powerdomain.h diff | blob | history
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