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(parent: 428a92c) | patch
MIPS: Decode c0_config4 for large TLBs.
authorDavid Daney <ddaney@caviumnetworks.com>
Fri, 22 Jan 2010 22:41:15 +0000 (14:41 -0800)
committerRalf Baechle <ralf@linux-mips.org>
Sat, 27 Feb 2010 11:53:13 +0000 (12:53 +0100)
commitd5e1cc1ff6c071917f59161b42c15692204452a6
treede172b4853b1aaa6684e5b7afed679c88d8ab655tree | snapshot
parent428a92cf0f413f0fcf2dc02396d90f5615b384f1commit | diff
MIPS: Decode c0_config4 for large TLBs.

For processors that have more than 64 TLBs, we need to decode both
config1 and config4 to determine the total number TLBs.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/866/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/mipsregs.h diff | blob | history
arch/mips/kernel/cpu-probe.c diff | blob | history
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