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(parent: 68d09dd) | patch
sunxi: enable DRAM initialization and SPL for V3s SoC
authorIcenowy Zheng <icenowy@aosc.io>
Sat, 3 Jun 2017 09:10:22 +0000 (17:10 +0800)
committerJagan Teki <jagan@amarulasolutions.com>
Thu, 8 Jun 2017 17:07:55 +0000 (22:37 +0530)
commitd5de39c33a1a0e3954d992a1b36a6578e7dbde77
treeb12de28a49cf5c878ea7fe52fa1688d9e93533dftree | snapshot
parent68d09dd96318cc0232ba51145713705cc36a9154commit | diff
sunxi: enable DRAM initialization and SPL for V3s SoC

As we have already support for the DesignWare DRAM controller and the
integrated DDR2 chip of V3s, let's enable the SPL support for V3s.

This patch also contains the default DRAM configuration for V3s.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
arch/arm/mach-sunxi/Kconfig diff | blob | history
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