]> git.baikalelectronics.ru Git - kernel.git/commit
mms: sdhci-esdhc-imx: Fix SDHCI_RESET_ALL for CQHCI
authorBrian Norris <briannorris@chromium.org>
Wed, 26 Oct 2022 19:42:06 +0000 (12:42 -0700)
committerUlf Hansson <ulf.hansson@linaro.org>
Mon, 7 Nov 2022 12:33:32 +0000 (13:33 +0100)
commitd4818e207b864a2791209869a6f38122433d191d
treed7931df80602490ab7dfc34634b7bfdf8193e8c3
parentdaf545a98e54e73fb8fb8138e55719d06c6393cc
mms: sdhci-esdhc-imx: Fix SDHCI_RESET_ALL for CQHCI

[[ NOTE: this is completely untested by the author, but included solely
    because, as noted in commit fbe0a8dc7ce8 ("mmc: sdhci-pci: Fix
    SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers"), "other
    drivers using CQHCI might benefit from a similar change, if they
    also have CQHCI reset by SDHCI_RESET_ALL." We've now seen the same
    bug on at least MSM, Arasan, and Intel hardware. ]]

SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't
tracking that properly in software. When out of sync, we may trigger
various timeouts.

It's not typical to perform resets while CQE is enabled, but this may
occur in some suspend or error recovery scenarios.

Include this fix by way of the new sdhci_and_cqhci_reset() helper.

This patch depends on (and should not compile without) the patch
entitled "mmc: cqhci: Provide helper for resetting both SDHCI and
CQHCI".

Fixes: bfab67b3356f ("mmc: sdhci-esdhc-imx: add CMDQ support")
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20221026124150.v4.4.I7d01f9ad11bacdc9213dee61b7918982aea39115@changeid
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/sdhci-esdhc-imx.c