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MIPS: CPS: Add CM/CPC 3.5 register definitions
authorPaul Burton <paul.burton@imgtec.com>
Sun, 13 Aug 2017 02:49:32 +0000 (19:49 -0700)
committerRalf Baechle <ralf@linux-mips.org>
Tue, 29 Aug 2017 22:57:26 +0000 (00:57 +0200)
commitd3d1154dad5fe7973d741450d9902788b3a8c490
treece49d3730432cbdb8e12a3af147b20da9c7e28b9tree | snapshot
parent76c56ec998508da51fee1e49b744d388e39a574dcommit | diff
MIPS: CPS: Add CM/CPC 3.5 register definitions

Introduce definitions & accessors for a selection of Coherence Manager
(CM) & Cluster Power Controller (CPC) registers that are new with CM
v3.5 & the MIPS I6500. These are primarily registers that will be used
in supporting multiple CPU clusters.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17006/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/mips-cm.h diff | blob | history
arch/mips/include/asm/mips-cpc.h diff | blob | history
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