]> git.baikalelectronics.ru Git - kernel.git/commit
drm: rcar-du: Fix H/V sync signal polarity configuration
authorKoji Matsuoka <koji.matsuoka.xm@renesas.com>
Mon, 16 May 2016 02:28:15 +0000 (11:28 +0900)
committerLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Mon, 14 Nov 2016 23:44:50 +0000 (01:44 +0200)
commitd31bc40b2e3d848e70221e6a7cf17e93c11fac46
tree4e8895caca0db0d50f0551e4c134a6ba1cc99f90
parentfd8e2f8ac592da8350e671f7cd7d56d47298b8e9
drm: rcar-du: Fix H/V sync signal polarity configuration

The VSL and HSL bits in the DSMR register set the corresponding
horizontal and vertical sync signal polarity to active high. The code
got it the wrong way around, fix it.

Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
drivers/gpu/drm/rcar-du/rcar_du_crtc.c