]> git.baikalelectronics.ru Git - kernel.git/commit
KVM: RISC-V: Avoid spurious virtual interrupts after clearing hideleg CSR
authorVincent Chen <vincent.chen@sifive.com>
Mon, 27 Dec 2021 03:05:14 +0000 (11:05 +0800)
committerAnup Patel <anup@brainfault.org>
Thu, 6 Jan 2022 09:48:18 +0000 (15:18 +0530)
commitd1b94c41e67e5857c5f5407e1b3e92eae9efe80b
tree57f04e4d5f58ce20973f94f7e1ea462235b98145
parent08bfe570437d113d13bfec738f277969845667fa
KVM: RISC-V: Avoid spurious virtual interrupts after clearing hideleg CSR

When the last VM is terminated, the host kernel will invoke function
hardware_disable_nolock() on each CPU to disable the related virtualization
functions. Here, RISC-V currently only clears hideleg CSR and hedeleg CSR.
This behavior will cause the host kernel to receive spurious interrupts if
hvip CSR has pending interrupts and the corresponding enable bits in vsie
CSR are asserted. To avoid it, hvip CSR and vsie CSR must be cleared
before clearing hideleg CSR.

Fixes: 69c9acb307a7 ("RISC-V: Add initial skeletal KVM support")
Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
arch/riscv/kvm/main.c