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PCI/PM: Note that PME can be generated from D0
authorBjorn Helgaas <bhelgaas@google.com>
Tue, 8 Oct 2019 20:28:00 +0000 (15:28 -0500)
committerBjorn Helgaas <bhelgaas@google.com>
Wed, 20 Nov 2019 23:33:46 +0000 (17:33 -0600)
commitcf527a91009bdfe3876925c6bd8278a66af2c453
tree31cec9768bc0e39466f2c7bd7d5e96815f2c12d9tree | snapshot
parentf6e06284a91e10f13eb4f23af38b48e62a8e4989commit | diff
PCI/PM: Note that PME can be generated from D0

Per PCIe r5.0 sec 7.5.2.1, PME may be generated from D0, so update
Documentation/power/pci.rst to reflect that.

Link: https://lore.kernel.org/r/20191016194450.68959-1-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Documentation/power/pci.rst diff | blob | history
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